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annotate modules/bluespec/Pygar/core/audioCorePipeline.bsv @ 47:97d1959f7c5c pygar svn.48

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[svn r48] changed sctipt to use our own programs, changed rlp.wav and rlp1.wav to be shorter
author rlm
date Wed, 05 May 2010 13:23:58 -0400
parents 4d87fa55a776
children a139cc07b773
rev   line source
punk@13 1 // The MIT License
punk@13 2
punk@13 3 // Copyright (c) 2009 Massachusetts Institute of Technology
punk@13 4
punk@13 5 // Permission is hereby granted, free of charge, to any person obtaining a copy
punk@13 6 // of this software and associated documentation files (the "Software"), to deal
punk@13 7 // in the Software without restriction, including without limitation the rights
punk@13 8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
punk@13 9 // copies of the Software, and to permit persons to whom the Software is
punk@13 10 // furnished to do so, subject to the following conditions:
punk@13 11
punk@13 12 // The above copyright notice and this permission notice shall be included in
punk@13 13 // all copies or substantial portions of the Software.
punk@13 14
punk@13 15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
punk@13 16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
punk@13 17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
punk@13 18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
punk@13 19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
punk@13 20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
punk@13 21 // THE SOFTWARE.
punk@13 22
punk@13 23 // Author: Kermin Fleming kfleming@mit.edu
punk@13 24
punk@13 25 import Connectable::*;
punk@13 26 import GetPut::*;
punk@13 27 import ClientServer::*;
punk@13 28 import FIFO::*;
punk@15 29 import SpecialFIFOs::*;
punk@13 30
punk@13 31 //AWB includes
punk@13 32 `include "asim/provides/low_level_platform_interface.bsh"
punk@13 33 `include "asim/provides/soft_connections.bsh"
punk@13 34 `include "asim/provides/common_services.bsh"
punk@13 35
punk@13 36 //Local includes
punk@13 37 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface
punk@33 38 `include "asim/provides/path_types.bsh"
punk@13 39 `include "asim/provides/core.bsh"
punk@43 40 `include "asim/provides/mixer.bsh"
punk@15 41 `include "asim/provides/processor_library.bsh"
punk@15 42 `include "asim/provides/fpga_components.bsh"
punk@33 43 `include "asim/provides/scratchpad_memory.bsh"
punk@33 44 `include "asim/provides/mem_services.bsh"
punk@33 45 `include "asim/dict/VDEV_SCRATCH.bsh"
punk@33 46
punk@13 47 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
punk@36 48 `include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
punk@13 49
punk@13 50 module [CONNECTED_MODULE] mkConnectedApplication ();
punk@13 51 Core core <- mkCore;
rlm@47 52 // RLM::
rlm@47 53 // the simple existance of this additional core causes the dreaded
rlm@47 54 // beast to emerge --- the ASSERTION FAILURE: sw/model/stats-device.cpp:317 Cycle:0
rlm@47 55 //stats device: Duplicate entry DATA_CACHE_NUM_WRITEBACKS, postion 0
rlm@47 56 //Core core1 <- mkCore;
punk@13 57 Reg#(int) cycle <- mkReg(0);
punk@13 58
punk@39 59 // Reg#(Bit#(32)) ac_fini <- mkReg(0);
punk@39 60
punk@13 61 //External memory
punk@13 62 // I'm not comfortable assuming that the memory subsystem is in order
punk@33 63 // So I'll insert a completion buffer here.
punk@33 64 MEMORY_IFC#(Bit#(18), Bit#(32)) memory <- mkScratchpad(`VDEV_SCRATCH_MEMORY, SCRATCHPAD_CACHED); //Services Memory items
punk@33 65
punk@33 66 // Services Samples
punk@15 67 ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();
punk@13 68 // Make this big enough so that several outstanding requests may be supported
punk@13 69 FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8);
punk@13 70
punk@36 71 //-----------------------------------------------------------
punk@36 72 // Debug port
punk@36 73
punk@36 74 ServerStub_AUDIOCORERRR server_stub <- mkServerStub_AUDIOCORERRR();
punk@36 75
punk@36 76
punk@13 77 // this is for the tracing
punk@13 78 rule printCycles;
punk@13 79 cycle <= cycle+1;
punk@13 80 $fdisplay(stderr, " => Cycle = %d", cycle);
punk@13 81 endrule
punk@13 82
punk@13 83 rule sendMemReq;
punk@13 84 let coreReq <- core.mmem_client.request.get;
punk@13 85 case (coreReq) matches
punk@13 86 tagged LoadReq .load: begin
punk@43 87 // $display("PIPE Load Addr Req %h", load.addr);
punk@13 88 //Allocate ROB space
punk@33 89 memory.readReq(truncate(load.addr>>2));
punk@13 90 tags.enq(load.tag);
punk@13 91 end
punk@42 92 tagged StoreReq .store: begin
punk@43 93 // $display("PIPE Write Addr Req %h", store.addr);
punk@33 94 memory.write(truncate(store.addr>>2),store.data);
punk@13 95 end
punk@13 96 endcase
punk@13 97 endrule
punk@13 98
punk@13 99 rule receiveMemResp;
punk@33 100 let memResp <- memory.readRsp();
punk@13 101 tags.deq;
punk@13 102 core.mmem_client.response.put(tagged LoadResp {data:memResp,
punk@13 103 tag: tags.first});
punk@43 104 // $display("PIPE Receive MemReq %x", memResp);
punk@13 105 endrule
punk@13 106
punk@13 107 rule feedOutput;
punk@13 108 let pipelineData <- core.sampleOutput.get();
punk@13 109 AudioProcessorControl endOfFileTag = EndOfFile;
punk@13 110 AudioProcessorControl sampleTag = Data;
punk@13 111
punk@25 112 case (pipelineData) matches
punk@25 113 tagged EndOfFile:
punk@15 114 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
punk@25 115 tagged Sample .sample:client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
punk@25 116 endcase
punk@13 117 endrule
punk@13 118
punk@36 119 //***** SERVER Side *****
punk@36 120
punk@39 121 /* (* conservative_implicit_conditions *)
punk@37 122 rule handleCPUToHost;
punk@37 123 let req <- server_stub.acceptRequest_ReadCPUToHost();
punk@37 124 case (req)
punk@37 125 0: server_stub.sendResponse_ReadCPUToHost(cp0_tohost);
punk@37 126 endcase
punk@37 127 endrule
punk@39 128 */
punk@36 129 rule feedInput;
punk@36 130 let command <- server_stub.acceptRequest_SendUnprocessedStream();
punk@36 131 AudioProcessorControl ctrl = unpack(truncate(command.ctrl));
rlm@41 132
rlm@41 133 Bit#(32) test = unpack(truncate(command.channel));
rlm@41 134 $display("rlm: %x", test);
rlm@41 135
rlm@41 136
rlm@41 137 if(ctrl == EndOfFile)
punk@36 138 begin
punk@43 139 $display("lsp: PIPE received EOF ");
punk@43 140 core.sampleInput.put(tagged EndOfFile);
punk@36 141 end
punk@36 142 else
punk@36 143 begin
punk@43 144 // $display("lsp: PIPE received Data ");
punk@43 145 core.sampleInput.put(tagged Sample unpack(truncate(command.sample)));
punk@36 146 end
punk@36 147 endrule
punk@13 148 endmodule