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comparison modules/bluespec/Pygar/core/audioCorePipeline.bsv @ 47:97d1959f7c5c pygar svn.48

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[svn r48] changed sctipt to use our own programs, changed rlp.wav and rlp1.wav to be shorter
author rlm
date Wed, 05 May 2010 13:23:58 -0400
parents 4d87fa55a776
children a139cc07b773
comparison
equal deleted inserted replaced
46:adcfa79d2c67 47:97d1959f7c5c
47 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh" 47 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
48 `include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh" 48 `include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
49 49
50 module [CONNECTED_MODULE] mkConnectedApplication (); 50 module [CONNECTED_MODULE] mkConnectedApplication ();
51 Core core <- mkCore; 51 Core core <- mkCore;
52 // RLM::
53 // the simple existance of this additional core causes the dreaded
54 // beast to emerge --- the ASSERTION FAILURE: sw/model/stats-device.cpp:317 Cycle:0
55 //stats device: Duplicate entry DATA_CACHE_NUM_WRITEBACKS, postion 0
56 //Core core1 <- mkCore;
52 Reg#(int) cycle <- mkReg(0); 57 Reg#(int) cycle <- mkReg(0);
53 58
54 // Reg#(Bit#(32)) ac_fini <- mkReg(0); 59 // Reg#(Bit#(32)) ac_fini <- mkReg(0);
55 60
56 //External memory 61 //External memory