annotate modules/bluespec/Pygar/lab4/data_cache.awb @ 63:1d5cbb5343d2 pygar svn.64

[svn r64] mods to compile correctly for FPGA
author punk
date Mon, 10 May 2010 22:54:54 -0400
parents 6179c07c21d7
children
rev   line source
rlm@8 1 %name Blocking Data Cache
rlm@8 2 %desc Parametric Blocking Data Cache
rlm@8 3
rlm@8 4 %provides data_cache
rlm@8 5
punk@11 6 %attributes PYGAR
rlm@8 7
rlm@8 8 %public DataCacheBlocking.bsv
rlm@8 9 %public DataCache.dic
rlm@8 10
punk@60 11 %generated -t VERILOG mkDataCache.v
punk@63 12 %generated -t BA mkDataCache.ba