changeset 65:cf8bb3038cbd pygar svn.66

[svn r66] sim passes
author punk
date Tue, 11 May 2010 09:05:22 -0400
parents bf08daea854e
children 6bd9397cd591
files modules/bluespec/Pygar/core/AudioCoreRRR.cpp modules/bluespec/Pygar/core/AudioCoreSystem.cpp modules/bluespec/Pygar/core/Processor.bsv modules/bluespec/Pygar/core/audioCore.bsv
diffstat 4 files changed, 12 insertions(+), 9 deletions(-) [+]
line wrap: on
line diff
     1.1 --- a/modules/bluespec/Pygar/core/AudioCoreRRR.cpp	Mon May 10 23:16:14 2010 -0400
     1.2 +++ b/modules/bluespec/Pygar/core/AudioCoreRRR.cpp	Tue May 11 09:05:22 2010 -0400
     1.3 @@ -20,11 +20,12 @@
     1.4  {
     1.5      // instantiate stub
     1.6  
     1.7 -    printf("ReceiveSide Created\n");
     1.8      outputFile = NULL;
     1.9      memory = NULL;
    1.10      fflush(stdout);
    1.11      count = 0;
    1.12 +    printf("ReceiveSide Created\n");
    1.13 +
    1.14  }
    1.15  
    1.16  // destructor
    1.17 @@ -132,7 +133,7 @@
    1.18        }
    1.19  
    1.20        CONNECTED_APPLICATION_CLASS::UpdateSemaphore(); 
    1.21 -      //      printf("rlm: writing data to out_hw.pcm\n");
    1.22 +      printf("rlm: writing data to out_hw.pcm\n");
    1.23        fwrite(&data, 2,1 , outputFile);
    1.24      break;
    1.25    }
     2.1 --- a/modules/bluespec/Pygar/core/AudioCoreSystem.cpp	Mon May 10 23:16:14 2010 -0400
     2.2 +++ b/modules/bluespec/Pygar/core/AudioCoreSystem.cpp	Tue May 11 09:05:22 2010 -0400
     2.3 @@ -35,7 +35,7 @@
     2.4    printf("InitSend Side\n");
     2.5    pthread_mutex_init(&lock, NULL);
     2.6    pthread_cond_init(&cond, NULL);
     2.7 -  sem_init(&throttle, 0, 64);
     2.8 +  sem_init(&throttle, 0, 256);
     2.9  
    2.10    // enable stats 
    2.11    //STATS_DEVICE_SERVER_CLASS::GetInstance()->SetupStats();
    2.12 @@ -103,6 +103,7 @@
    2.13  
    2.14    int count = 0;
    2.15  
    2.16 +  sleep(1);
    2.17    printf("main:samples about to start sending %d\n", count);  
    2.18  
    2.19    //rlm: here we read both files. later refactor into a function.
    2.20 @@ -120,7 +121,8 @@
    2.21  	 coreFin = true;
    2.22         }
    2.23      */
    2.24 -
    2.25 +     sem_wait(&throttle);
    2.26 + 
    2.27       if(count%1000 == 0)
    2.28       printf("main: %d\n", count);
    2.29       count++;
     3.1 --- a/modules/bluespec/Pygar/core/Processor.bsv	Mon May 10 23:16:14 2010 -0400
     3.2 +++ b/modules/bluespec/Pygar/core/Processor.bsv	Tue May 11 09:05:22 2010 -0400
     3.3 @@ -569,7 +569,7 @@
     3.4                 5'd20 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_fromhost });
     3.5                 5'd21 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_tohost   });
     3.6  	       5'd25 : begin
     3.7 -//			  $display( "**** EOF Requested\n ");
     3.8 +//			  $display( "**** EOF Requested");
     3.9  			  let sample = inAudioFifo.first();
    3.10  			  case (sample) matches
    3.11  			     tagged EndOfFile :
    3.12 @@ -583,7 +583,7 @@
    3.13  			  endcase
    3.14  		       end
    3.15  	       5'd28 : begin
    3.16 -//			  $display( "***** Reqesting Sample \n");
    3.17 +			  $display( "***** Reqesting Sample");
    3.18  			  let sample = inAudioFifo.first();        // is this going to cause perf. delay?
    3.19  			  if (sample matches tagged Sample .audio) // if it is EOF another rule sets the cp0_audioEOF  
    3.20  	     		     wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) });  // do I need pack?
     4.1 --- a/modules/bluespec/Pygar/core/audioCore.bsv	Mon May 10 23:16:14 2010 -0400
     4.2 +++ b/modules/bluespec/Pygar/core/audioCore.bsv	Tue May 11 09:05:22 2010 -0400
     4.3 @@ -83,13 +83,13 @@
     4.4      let coreReq <- marb.mmem_client.request.get;
     4.5      case (coreReq) matches 
     4.6        tagged LoadReq .load: begin
     4.7 -//	                      $display("PIPE Load Addr Req %h", load.addr); 
     4.8 +	                      $display("CORE: Load Addr Req %h", load.addr); 
     4.9                                //Allocate ROB space
    4.10                                memory.readReq(truncate(load.addr>>2));
    4.11                                tags.enq(load.tag);
    4.12                              end
    4.13        tagged StoreReq .store: begin
    4.14 -//	  	              $display("PIPE Write Addr Req %h", store.addr); 
    4.15 +	  	              $display("CORE: Write Addr Req %h", store.addr); 
    4.16  	                      memory.write(truncate(store.addr>>2),store.data);
    4.17                                end
    4.18      endcase
    4.19 @@ -100,7 +100,7 @@
    4.20      tags.deq;
    4.21      marb.mmem_client.response.put(tagged LoadResp {data:memResp,
    4.22                                                     tag: tags.first});
    4.23 -//   	                $display("PIPE Receive MemReq %x", memResp); 
    4.24 +   	                $display("CORE: Receive MemReq %x", memResp); 
    4.25    endrule
    4.26  
    4.27    // Methods