# HG changeset patch
# User punk
# Date 1273583122 14400
# Node ID cf8bb3038cbdfd56b9340b2837c33e03e006f233
# Parent  bf08daea854e7640b59894169a56437476a2bffb
[svn r66] sim passes

diff -r bf08daea854e -r cf8bb3038cbd modules/bluespec/Pygar/core/AudioCoreRRR.cpp
--- a/modules/bluespec/Pygar/core/AudioCoreRRR.cpp	Mon May 10 23:16:14 2010 -0400
+++ b/modules/bluespec/Pygar/core/AudioCoreRRR.cpp	Tue May 11 09:05:22 2010 -0400
@@ -20,11 +20,12 @@
 {
     // instantiate stub
 
-    printf("ReceiveSide Created\n");
     outputFile = NULL;
     memory = NULL;
     fflush(stdout);
     count = 0;
+    printf("ReceiveSide Created\n");
+
 }
 
 // destructor
@@ -132,7 +133,7 @@
       }
 
       CONNECTED_APPLICATION_CLASS::UpdateSemaphore(); 
-      //      printf("rlm: writing data to out_hw.pcm\n");
+      printf("rlm: writing data to out_hw.pcm\n");
       fwrite(&data, 2,1 , outputFile);
     break;
   }
diff -r bf08daea854e -r cf8bb3038cbd modules/bluespec/Pygar/core/AudioCoreSystem.cpp
--- a/modules/bluespec/Pygar/core/AudioCoreSystem.cpp	Mon May 10 23:16:14 2010 -0400
+++ b/modules/bluespec/Pygar/core/AudioCoreSystem.cpp	Tue May 11 09:05:22 2010 -0400
@@ -35,7 +35,7 @@
   printf("InitSend Side\n");
   pthread_mutex_init(&lock, NULL);
   pthread_cond_init(&cond, NULL);
-  sem_init(&throttle, 0, 64);
+  sem_init(&throttle, 0, 256);
 
   // enable stats 
   //STATS_DEVICE_SERVER_CLASS::GetInstance()->SetupStats();
@@ -103,6 +103,7 @@
 
   int count = 0;
 
+  sleep(1);
   printf("main:samples about to start sending %d\n", count);  
 
   //rlm: here we read both files. later refactor into a function.
@@ -120,7 +121,8 @@
 	 coreFin = true;
        }
     */
-
+     sem_wait(&throttle);
+ 
      if(count%1000 == 0)
      printf("main: %d\n", count);
      count++;
diff -r bf08daea854e -r cf8bb3038cbd modules/bluespec/Pygar/core/Processor.bsv
--- a/modules/bluespec/Pygar/core/Processor.bsv	Mon May 10 23:16:14 2010 -0400
+++ b/modules/bluespec/Pygar/core/Processor.bsv	Tue May 11 09:05:22 2010 -0400
@@ -569,7 +569,7 @@
                5'd20 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_fromhost });
                5'd21 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_tohost   });
 	       5'd25 : begin
-//			  $display( "**** EOF Requested\n ");
+//			  $display( "**** EOF Requested");
 			  let sample = inAudioFifo.first();
 			  case (sample) matches
 			     tagged EndOfFile :
@@ -583,7 +583,7 @@
 			  endcase
 		       end
 	       5'd28 : begin
-//			  $display( "***** Reqesting Sample \n");
+			  $display( "***** Reqesting Sample");
 			  let sample = inAudioFifo.first();        // is this going to cause perf. delay?
 			  if (sample matches tagged Sample .audio) // if it is EOF another rule sets the cp0_audioEOF  
 	     		     wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) });  // do I need pack?
diff -r bf08daea854e -r cf8bb3038cbd modules/bluespec/Pygar/core/audioCore.bsv
--- a/modules/bluespec/Pygar/core/audioCore.bsv	Mon May 10 23:16:14 2010 -0400
+++ b/modules/bluespec/Pygar/core/audioCore.bsv	Tue May 11 09:05:22 2010 -0400
@@ -83,13 +83,13 @@
     let coreReq <- marb.mmem_client.request.get;
     case (coreReq) matches 
       tagged LoadReq .load: begin
-//	                      $display("PIPE Load Addr Req %h", load.addr); 
+	                      $display("CORE: Load Addr Req %h", load.addr); 
                               //Allocate ROB space
                               memory.readReq(truncate(load.addr>>2));
                               tags.enq(load.tag);
                             end
       tagged StoreReq .store: begin
-//	  	              $display("PIPE Write Addr Req %h", store.addr); 
+	  	              $display("CORE: Write Addr Req %h", store.addr); 
 	                      memory.write(truncate(store.addr>>2),store.data);
                               end
     endcase
@@ -100,7 +100,7 @@
     tags.deq;
     marb.mmem_client.response.put(tagged LoadResp {data:memResp,
                                                    tag: tags.first});
-//   	                $display("PIPE Receive MemReq %x", memResp); 
+   	                $display("CORE: Receive MemReq %x", memResp); 
   endrule
 
   // Methods