Mercurial > pygar
changeset 62:90fa9b289aab pygar svn.63
[svn r63] synthesis boundaries
| author | punk |
|---|---|
| date | Mon, 10 May 2010 21:00:49 -0400 |
| parents | 74d2fe78f36a |
| children | 1d5cbb5343d2 |
| files | modules/bluespec/Pygar/lab4/BRegFile.bsv |
| diffstat | 1 files changed, 28 insertions(+), 14 deletions(-) [+] |
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1.1 --- a/modules/bluespec/Pygar/lab4/BRegFile.bsv Mon May 10 20:31:25 2010 -0400 1.2 +++ b/modules/bluespec/Pygar/lab4/BRegFile.bsv Mon May 10 21:00:49 2010 -0400 1.3 @@ -11,15 +11,15 @@ 1.4 // Register file module 1.5 //----------------------------------------------------------- 1.6 1.7 -interface BRegFile #(type index_t, type data_t); 1.8 - method Action upd(index_t addr, data_t data); 1.9 - method data_t sub(index_t addr); 1.10 +interface BRFile; 1.11 + method Action wr( Rindx rindx, Bit#(32) data ); 1.12 + method Action Value Bit#(32) rd1( Rindx rindx ); 1.13 + method Action Value Bit#(32) rd2( Rindx rindx ); 1.14 endinterface 1.15 1.16 - 1.17 (* doc = "synthesis attribute ram_style mkBRegFile distributed;" *) 1.18 (* synthesize *) 1.19 -module mkBRegFile(RegFile#(index_t, data_t)) 1.20 +module mkBRegFile(BRFile) 1.21 provisos (Bits#(index_t, size_index), 1.22 Bits#(data_t, size_data), 1.23 Eq#(index_t), 1.24 @@ -28,17 +28,31 @@ 1.25 LUTRAM#(index_t, data_t) rf <- mkLUTRAMU_RegFile(); 1.26 RWire#(Tuple2#(index_t, data_t)) rw <-mkRWire(); 1.27 1.28 - method Action upd (index_t r, data_t d); 1.29 - rf.upd(r,d); 1.30 - rw.wset(tuple2(r,d)); 1.31 + method Action wr( Rindx rindx, Bit#(32) data ); 1.32 + rf.upd( rindx, data ); 1.33 + rw.wset(tuple2(rindex,data)); 1.34 endmethod 1.35 1.36 - method data_t sub (index_t r); 1.37 - case (rw.wget()) matches 1.38 - tagged Valid {.wr, .d} : 1.39 - return (wr == r) ? d : rf.sub(r); 1.40 - tagged Invalid : return rf.sub(r); 1.41 - endcase 1.42 + method Bit#(32) rd1 (Rindx r); 1.43 + if (r == 0) return 0; 1.44 + else begin 1.45 + case (rw.wget()) matches 1.46 + tagged Valid {.wr, .d} : 1.47 + return (wr == r) ? d : rf.sub(r); 1.48 + tagged Invalid : return rf.sub(r); 1.49 + endcase 1.50 + end 1.51 + endmethod 1.52 + 1.53 + method Bit#(32) rd2 (Rindx r); 1.54 + if (r == 0) return 0; 1.55 + else begin 1.56 + case (rw.wget()) matches 1.57 + tagged Valid {.wr, .d} : 1.58 + return (wr == r) ? d : rf.sub(r); 1.59 + tagged Invalid : return rf.sub(r); 1.60 + endcase 1.61 + end 1.62 endmethod 1.63 1.64 endmodule