diff core/sim/bdir_dut/BRegFile.bi @ 1:91a1f76ddd62 pygar svn.2

[svn r2] Adding initial lab 5 source
author punk
date Tue, 13 Apr 2010 17:34:33 -0400
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     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/core/sim/bdir_dut/BRegFile.bi	Tue Apr 13 17:34:33 2010 -0400
     1.3 @@ -0,0 +1,54 @@
     1.4 +signature BRegFile where {
     1.5 +import ¶Counter®¶;
     1.6 +		 
     1.7 +import ¶FIFOF_®¶;
     1.8 +		
     1.9 +import ¶FIFOF®¶;
    1.10 +	       
    1.11 +import ¶FIFO®¶;
    1.12 +	      
    1.13 +import ¶Inout®¶;
    1.14 +	       
    1.15 +import ¶List®¶;
    1.16 +	      
    1.17 +import ¶Clocks®¶;
    1.18 +		
    1.19 +import ¶ListN®¶;
    1.20 +	       
    1.21 +import ¶PrimArray®¶;
    1.22 +		   
    1.23 +import ¶RWire®¶;
    1.24 +	       
    1.25 +import ¶RegFile®¶;
    1.26 +		 
    1.27 +import ¶Vector®¶;
    1.28 +		
    1.29 +import ¶Connectable®¶;
    1.30 +		     
    1.31 +import ¶GetPut®¶;
    1.32 +		
    1.33 +import ¶ClientServer®¶;
    1.34 +		      
    1.35 +import Trace;
    1.36 +	    
    1.37 +import ProcTypes;
    1.38 +		
    1.39 +interface (BRegFile.BRegFile :: * -> * -> *) index_t data_t = {
    1.40 +    BRegFile.upd :: index_t -> data_t -> ¶Prelude®¶.¶Action®¶ {-# arg_names = [addr, ¡data¡] #-};
    1.41 +    BRegFile.sub :: index_t -> data_t {-# arg_names = [addr] #-}
    1.42 +};
    1.43 + 
    1.44 +instance BRegFile (¶Prelude®¶.¶PrimMakeUndefined®¶ data_t) =>
    1.45 +		  ¶Prelude®¶.¶PrimMakeUndefined®¶ (BRegFile.BRegFile index_t data_t);
    1.46 +										    
    1.47 +instance BRegFile ¶Prelude®¶.¶PrimDeepSeqCond®¶ (BRegFile.BRegFile index_t data_t);
    1.48 +										  
    1.49 +instance BRegFile ¶Prelude®¶.¶PrimMakeUninitialized®¶ (BRegFile.BRegFile index_t data_t);
    1.50 +											
    1.51 +BRegFile.mkBRegFile :: (¶Prelude®¶.¶Bounded®¶ index_t,
    1.52 +			¶Prelude®¶.¶Eq®¶ index_t,
    1.53 +			¶Prelude®¶.¶Bits®¶ data_t size_data,
    1.54 +			¶Prelude®¶.¶Bits®¶ index_t size_index,
    1.55 +			¶Prelude®¶.¶IsModule®¶ _m__ _c__) =>
    1.56 +		       _m__ (¶RegFile®¶.¶RegFile®¶ index_t data_t)
    1.57 +}