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comparison modules/bluespec/Pygar/lab4/BRegFile.bsv @ 58:52f9a257c2ba pygar svn.59

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[svn r59] LUTRAMing
author punk
date Mon, 10 May 2010 13:47:12 -0400
parents 74716e9a81cc
children 92041177735c
comparison
equal deleted inserted replaced
57:b5be746a0d74 58:52f9a257c2ba
1 import RegFile::*; 1 import RegFile::*;
2 import RWire::*; 2 import RWire::*;
3 import ProcTypes::*; 3 import ProcTypes::*;
4
5 `include "asim/provides/low_level_platform_interface.bsh"
6 `include "asim/provides/soft_connections.bsh"
7 `include "asim/provides/fpga_components.bsh"
8 `include "asim/provides/common_services.bsh"
4 9
5 //----------------------------------------------------------- 10 //-----------------------------------------------------------
6 // Register file module 11 // Register file module
7 //----------------------------------------------------------- 12 //-----------------------------------------------------------
8 13
15 provisos (Bits#(index_t, size_index), 20 provisos (Bits#(index_t, size_index),
16 Bits#(data_t, size_data), 21 Bits#(data_t, size_data),
17 Eq#(index_t), 22 Eq#(index_t),
18 Bounded#(index_t) ); 23 Bounded#(index_t) );
19 24
20 RegFile#(index_t, data_t) rf <- mkRegFileWCF(minBound, maxBound); 25 LUTRAM#(index_t, data_t) rf <- mkLUTRAM_RegFile();
21 RWire#(Tuple2#(index_t, data_t)) rw <-mkRWire(); 26 RWire#(Tuple2#(index_t, data_t)) rw <-mkRWire();
22 27
23 method Action upd (index_t r, data_t d); 28 method Action upd (index_t r, data_t d);
24 rf.upd(r,d); 29 rf.upd(r,d);
25 rw.wset(tuple2(r,d)); 30 rw.wset(tuple2(r,d));