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annotate snes_spc/SNES_SPC_misc.cpp @ 9:477c36226481 tip

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added old scripts for historical interest.
author Robert McIntyre <rlm@mit.edu>
date Fri, 21 Oct 2011 07:46:18 -0700
parents e38dacceb958
children
rev   line source
rlm@0 1 // SPC emulation support: init, sample buffering, reset, SPC loading
rlm@0 2
rlm@0 3 // snes_spc 0.9.0. http://www.slack.net/~ant/
rlm@0 4
rlm@0 5 #include "SNES_SPC.h"
rlm@0 6
rlm@0 7 #include <string.h>
rlm@0 8
rlm@0 9 /* Copyright (C) 2004-2007 Shay Green. This module is free software; you
rlm@0 10 can redistribute it and/or modify it under the terms of the GNU Lesser
rlm@0 11 General Public License as published by the Free Software Foundation; either
rlm@0 12 version 2.1 of the License, or (at your option) any later version. This
rlm@0 13 module is distributed in the hope that it will be useful, but WITHOUT ANY
rlm@0 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
rlm@0 15 FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
rlm@0 16 details. You should have received a copy of the GNU Lesser General Public
rlm@0 17 License along with this module; if not, write to the Free Software Foundation,
rlm@0 18 Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
rlm@0 19
rlm@0 20 #include "blargg_source.h"
rlm@0 21
rlm@0 22 #define RAM (m.ram.ram)
rlm@0 23 #define REGS (m.smp_regs [0])
rlm@0 24 #define REGS_IN (m.smp_regs [1])
rlm@0 25
rlm@0 26 // (n ? n : 256)
rlm@0 27 #define IF_0_THEN_256( n ) ((uint8_t) ((n) - 1) + 1)
rlm@0 28
rlm@0 29
rlm@0 30 //// Init
rlm@0 31
rlm@0 32 blargg_err_t SNES_SPC::init()
rlm@0 33 {
rlm@0 34 memset( &m, 0, sizeof m );
rlm@0 35 dsp.init( RAM );
rlm@0 36
rlm@0 37 m.tempo = tempo_unit;
rlm@0 38
rlm@0 39 // Most SPC music doesn't need ROM, and almost all the rest only rely
rlm@0 40 // on these two bytes
rlm@0 41 m.rom [0x3E] = 0xFF;
rlm@0 42 m.rom [0x3F] = 0xC0;
rlm@0 43
rlm@0 44 static unsigned char const cycle_table [128] =
rlm@0 45 {// 01 23 45 67 89 AB CD EF
rlm@0 46 0x28,0x47,0x34,0x36,0x26,0x54,0x54,0x68, // 0
rlm@0 47 0x48,0x47,0x45,0x56,0x55,0x65,0x22,0x46, // 1
rlm@0 48 0x28,0x47,0x34,0x36,0x26,0x54,0x54,0x74, // 2
rlm@0 49 0x48,0x47,0x45,0x56,0x55,0x65,0x22,0x38, // 3
rlm@0 50 0x28,0x47,0x34,0x36,0x26,0x44,0x54,0x66, // 4
rlm@0 51 0x48,0x47,0x45,0x56,0x55,0x45,0x22,0x43, // 5
rlm@0 52 0x28,0x47,0x34,0x36,0x26,0x44,0x54,0x75, // 6
rlm@0 53 0x48,0x47,0x45,0x56,0x55,0x55,0x22,0x36, // 7
rlm@0 54 0x28,0x47,0x34,0x36,0x26,0x54,0x52,0x45, // 8
rlm@0 55 0x48,0x47,0x45,0x56,0x55,0x55,0x22,0xC5, // 9
rlm@0 56 0x38,0x47,0x34,0x36,0x26,0x44,0x52,0x44, // A
rlm@0 57 0x48,0x47,0x45,0x56,0x55,0x55,0x22,0x34, // B
rlm@0 58 0x38,0x47,0x45,0x47,0x25,0x64,0x52,0x49, // C
rlm@0 59 0x48,0x47,0x56,0x67,0x45,0x55,0x22,0x83, // D
rlm@0 60 0x28,0x47,0x34,0x36,0x24,0x53,0x43,0x40, // E
rlm@0 61 0x48,0x47,0x45,0x56,0x34,0x54,0x22,0x60, // F
rlm@0 62 };
rlm@0 63
rlm@0 64 // unpack cycle table
rlm@0 65 for ( int i = 0; i < 128; i++ )
rlm@0 66 {
rlm@0 67 int n = cycle_table [i];
rlm@0 68 m.cycle_table [i * 2 + 0] = n >> 4;
rlm@0 69 m.cycle_table [i * 2 + 1] = n & 0x0F;
rlm@0 70 }
rlm@0 71
rlm@0 72 #if SPC_LESS_ACCURATE
rlm@0 73 memcpy( reg_times, reg_times_, sizeof reg_times );
rlm@0 74 #endif
rlm@0 75
rlm@0 76 reset();
rlm@0 77 return 0;
rlm@0 78 }
rlm@0 79
rlm@0 80 void SNES_SPC::init_rom( uint8_t const in [rom_size] )
rlm@0 81 {
rlm@0 82 memcpy( m.rom, in, sizeof m.rom );
rlm@0 83 }
rlm@0 84
rlm@0 85 void SNES_SPC::set_tempo( int t )
rlm@0 86 {
rlm@0 87 m.tempo = t;
rlm@0 88 int const timer2_shift = 4; // 64 kHz
rlm@0 89 int const other_shift = 3; // 8 kHz
rlm@0 90
rlm@0 91 #if SPC_DISABLE_TEMPO
rlm@0 92 m.timers [2].prescaler = timer2_shift;
rlm@0 93 m.timers [1].prescaler = timer2_shift + other_shift;
rlm@0 94 m.timers [0].prescaler = timer2_shift + other_shift;
rlm@0 95 #else
rlm@0 96 if ( !t )
rlm@0 97 t = 1;
rlm@0 98 int const timer2_rate = 1 << timer2_shift;
rlm@0 99 int rate = (timer2_rate * tempo_unit + (t >> 1)) / t;
rlm@0 100 if ( rate < timer2_rate / 4 )
rlm@0 101 rate = timer2_rate / 4; // max 4x tempo
rlm@0 102 m.timers [2].prescaler = rate;
rlm@0 103 m.timers [1].prescaler = rate << other_shift;
rlm@0 104 m.timers [0].prescaler = rate << other_shift;
rlm@0 105 #endif
rlm@0 106 }
rlm@0 107
rlm@0 108 // Timer registers have been loaded. Applies these to the timers. Does not
rlm@0 109 // reset timer prescalers or dividers.
rlm@0 110 void SNES_SPC::timers_loaded()
rlm@0 111 {
rlm@0 112 int i;
rlm@0 113 for ( i = 0; i < timer_count; i++ )
rlm@0 114 {
rlm@0 115 Timer* t = &m.timers [i];
rlm@0 116 t->period = IF_0_THEN_256( REGS [r_t0target + i] );
rlm@0 117 t->enabled = REGS [r_control] >> i & 1;
rlm@0 118 t->counter = REGS_IN [r_t0out + i] & 0x0F;
rlm@0 119 }
rlm@0 120
rlm@0 121 set_tempo( m.tempo );
rlm@0 122 }
rlm@0 123
rlm@0 124 // Loads registers from unified 16-byte format
rlm@0 125 void SNES_SPC::load_regs( uint8_t const in [reg_count] )
rlm@0 126 {
rlm@0 127 memcpy( REGS, in, reg_count );
rlm@0 128 memcpy( REGS_IN, REGS, reg_count );
rlm@0 129
rlm@0 130 // These always read back as 0
rlm@0 131 REGS_IN [r_test ] = 0;
rlm@0 132 REGS_IN [r_control ] = 0;
rlm@0 133 REGS_IN [r_t0target] = 0;
rlm@0 134 REGS_IN [r_t1target] = 0;
rlm@0 135 REGS_IN [r_t2target] = 0;
rlm@0 136 }
rlm@0 137
rlm@0 138 // RAM was just loaded from SPC, with $F0-$FF containing SMP registers
rlm@0 139 // and timer counts. Copies these to proper registers.
rlm@0 140 void SNES_SPC::ram_loaded()
rlm@0 141 {
rlm@0 142 m.rom_enabled = 0;
rlm@0 143 load_regs( &RAM [0xF0] );
rlm@0 144
rlm@0 145 // Put STOP instruction around memory to catch PC underflow/overflow
rlm@0 146 memset( m.ram.padding1, cpu_pad_fill, sizeof m.ram.padding1 );
rlm@0 147 memset( m.ram.padding2, cpu_pad_fill, sizeof m.ram.padding2 );
rlm@0 148 }
rlm@0 149
rlm@0 150 // Registers were just loaded. Applies these new values.
rlm@0 151 void SNES_SPC::regs_loaded()
rlm@0 152 {
rlm@0 153 enable_rom( REGS [r_control] & 0x80 );
rlm@0 154 timers_loaded();
rlm@0 155 }
rlm@0 156
rlm@0 157 void SNES_SPC::reset_time_regs()
rlm@0 158 {
rlm@0 159 m.cpu_error = 0;
rlm@0 160 m.echo_accessed = 0;
rlm@0 161 m.spc_time = 0;
rlm@0 162 m.dsp_time = 0;
rlm@0 163 #if SPC_LESS_ACCURATE
rlm@0 164 m.dsp_time = clocks_per_sample + 1;
rlm@0 165 #endif
rlm@0 166
rlm@0 167 for ( int i = 0; i < timer_count; i++ )
rlm@0 168 {
rlm@0 169 Timer* t = &m.timers [i];
rlm@0 170 t->next_time = 1;
rlm@0 171 t->divider = 0;
rlm@0 172 }
rlm@0 173
rlm@0 174 regs_loaded();
rlm@0 175
rlm@0 176 m.extra_clocks = 0;
rlm@0 177 reset_buf();
rlm@0 178 }
rlm@0 179
rlm@0 180 void SNES_SPC::reset_common( int timer_counter_init )
rlm@0 181 {
rlm@0 182 int i;
rlm@0 183 for ( i = 0; i < timer_count; i++ )
rlm@0 184 REGS_IN [r_t0out + i] = timer_counter_init;
rlm@0 185
rlm@0 186 // Run IPL ROM
rlm@0 187 memset( &m.cpu_regs, 0, sizeof m.cpu_regs );
rlm@0 188 m.cpu_regs.pc = rom_addr;
rlm@0 189
rlm@0 190 REGS [r_test ] = 0x0A;
rlm@0 191 REGS [r_control] = 0xB0; // ROM enabled, clear ports
rlm@0 192 for ( i = 0; i < port_count; i++ )
rlm@0 193 REGS_IN [r_cpuio0 + i] = 0;
rlm@0 194
rlm@0 195 reset_time_regs();
rlm@0 196 }
rlm@0 197
rlm@0 198 void SNES_SPC::soft_reset()
rlm@0 199 {
rlm@0 200 reset_common( 0 );
rlm@0 201 dsp.soft_reset();
rlm@0 202 }
rlm@0 203
rlm@0 204 void SNES_SPC::reset()
rlm@0 205 {
rlm@0 206 memset( RAM, 0xFF, 0x10000 );
rlm@0 207 ram_loaded();
rlm@0 208 reset_common( 0x0F );
rlm@0 209 dsp.reset();
rlm@0 210 }
rlm@0 211
rlm@0 212 char const SNES_SPC::signature [signature_size + 1] =
rlm@0 213 "SNES-SPC700 Sound File Data v0.30\x1A\x1A";
rlm@0 214
rlm@0 215 blargg_err_t SNES_SPC::load_spc( void const* data, long size )
rlm@0 216 {
rlm@0 217 spc_file_t const* const spc = (spc_file_t const*) data;
rlm@0 218
rlm@0 219 // be sure compiler didn't insert any padding into fle_t
rlm@0 220 assert( sizeof (spc_file_t) == spc_min_file_size + 0x80 );
rlm@0 221
rlm@0 222 // Check signature and file size
rlm@0 223 if ( size < signature_size || memcmp( spc, signature, 27 ) )
rlm@0 224 return "Not an SPC file";
rlm@0 225
rlm@0 226 if ( size < spc_min_file_size )
rlm@0 227 return "Corrupt SPC file";
rlm@0 228
rlm@0 229 // CPU registers
rlm@0 230 m.cpu_regs.pc = spc->pch * 0x100 + spc->pcl;
rlm@0 231 m.cpu_regs.a = spc->a;
rlm@0 232 m.cpu_regs.x = spc->x;
rlm@0 233 m.cpu_regs.y = spc->y;
rlm@0 234 m.cpu_regs.psw = spc->psw;
rlm@0 235 m.cpu_regs.sp = spc->sp;
rlm@0 236
rlm@0 237 // RAM and registers
rlm@0 238 memcpy( RAM, spc->ram, 0x10000 );
rlm@0 239 ram_loaded();
rlm@0 240
rlm@0 241 // DSP registers
rlm@0 242 dsp.load( spc->dsp );
rlm@0 243
rlm@0 244 reset_time_regs();
rlm@0 245
rlm@0 246 return 0;
rlm@0 247 }
rlm@0 248
rlm@0 249 void SNES_SPC::clear_echo()
rlm@0 250 {
rlm@0 251 if ( !(dsp.read( SPC_DSP::r_flg ) & 0x20) )
rlm@0 252 {
rlm@0 253 int addr = 0x100 * dsp.read( SPC_DSP::r_esa );
rlm@0 254 int end = addr + 0x800 * (dsp.read( SPC_DSP::r_edl ) & 0x0F);
rlm@0 255 if ( end > 0x10000 )
rlm@0 256 end = 0x10000;
rlm@0 257 memset( &RAM [addr], 0xFF, end - addr );
rlm@0 258 }
rlm@0 259 }
rlm@0 260
rlm@0 261
rlm@0 262 //// Sample output
rlm@0 263
rlm@0 264 void SNES_SPC::reset_buf()
rlm@0 265 {
rlm@0 266 // Start with half extra buffer of silence
rlm@0 267 sample_t* out = m.extra_buf;
rlm@0 268 while ( out < &m.extra_buf [extra_size / 2] )
rlm@0 269 *out++ = 0;
rlm@0 270
rlm@0 271 m.extra_pos = out;
rlm@0 272 m.buf_begin = 0;
rlm@0 273
rlm@0 274 dsp.set_output( 0, 0 );
rlm@0 275 }
rlm@0 276
rlm@0 277 void SNES_SPC::set_output( sample_t* out, int size )
rlm@0 278 {
rlm@0 279 require( (size & 1) == 0 ); // size must be even
rlm@0 280
rlm@0 281 m.extra_clocks &= clocks_per_sample - 1;
rlm@0 282 if ( out )
rlm@0 283 {
rlm@0 284 sample_t const* out_end = out + size;
rlm@0 285 m.buf_begin = out;
rlm@0 286 m.buf_end = out_end;
rlm@0 287
rlm@0 288 // Copy extra to output
rlm@0 289 sample_t const* in = m.extra_buf;
rlm@0 290 while ( in < m.extra_pos && out < out_end )
rlm@0 291 *out++ = *in++;
rlm@0 292
rlm@0 293 // Handle output being full already
rlm@0 294 if ( out >= out_end )
rlm@0 295 {
rlm@0 296 // Have DSP write to remaining extra space
rlm@0 297 out = dsp.extra();
rlm@0 298 out_end = &dsp.extra() [extra_size];
rlm@0 299
rlm@0 300 // Copy any remaining extra samples as if DSP wrote them
rlm@0 301 while ( in < m.extra_pos )
rlm@0 302 *out++ = *in++;
rlm@0 303 assert( out <= out_end );
rlm@0 304 }
rlm@0 305
rlm@0 306 dsp.set_output( out, out_end - out );
rlm@0 307 }
rlm@0 308 else
rlm@0 309 {
rlm@0 310 reset_buf();
rlm@0 311 }
rlm@0 312 }
rlm@0 313
rlm@0 314 void SNES_SPC::save_extra()
rlm@0 315 {
rlm@0 316 // Get end pointers
rlm@0 317 sample_t const* main_end = m.buf_end; // end of data written to buf
rlm@0 318 sample_t const* dsp_end = dsp.out_pos(); // end of data written to dsp.extra()
rlm@0 319 if ( m.buf_begin <= dsp_end && dsp_end <= main_end )
rlm@0 320 {
rlm@0 321 main_end = dsp_end;
rlm@0 322 dsp_end = dsp.extra(); // nothing in DSP's extra
rlm@0 323 }
rlm@0 324
rlm@0 325 // Copy any extra samples at these ends into extra_buf
rlm@0 326 sample_t* out = m.extra_buf;
rlm@0 327 sample_t const* in;
rlm@0 328 for ( in = m.buf_begin + sample_count(); in < main_end; in++ )
rlm@0 329 *out++ = *in;
rlm@0 330 for ( in = dsp.extra(); in < dsp_end ; in++ )
rlm@0 331 *out++ = *in;
rlm@0 332
rlm@0 333 m.extra_pos = out;
rlm@0 334 assert( out <= &m.extra_buf [extra_size] );
rlm@0 335 }
rlm@0 336
rlm@0 337 blargg_err_t SNES_SPC::play( int count, sample_t* out )
rlm@0 338 {
rlm@0 339 require( (count & 1) == 0 ); // must be even
rlm@0 340 if ( count )
rlm@0 341 {
rlm@0 342 set_output( out, count );
rlm@0 343 end_frame( count * (clocks_per_sample / 2) );
rlm@0 344 }
rlm@0 345
rlm@0 346 const char* err = m.cpu_error;
rlm@0 347 m.cpu_error = 0;
rlm@0 348 return err;
rlm@0 349 }
rlm@0 350
rlm@0 351 blargg_err_t SNES_SPC::skip( int count )
rlm@0 352 {
rlm@0 353 #if SPC_LESS_ACCURATE
rlm@0 354 if ( count > 2 * sample_rate * 2 )
rlm@0 355 {
rlm@0 356 set_output( 0, 0 );
rlm@0 357
rlm@0 358 // Skip a multiple of 4 samples
rlm@0 359 time_t end = count;
rlm@0 360 count = (count & 3) + 1 * sample_rate * 2;
rlm@0 361 end = (end - count) * (clocks_per_sample / 2);
rlm@0 362
rlm@0 363 m.skipped_kon = 0;
rlm@0 364 m.skipped_koff = 0;
rlm@0 365
rlm@0 366 // Preserve DSP and timer synchronization
rlm@0 367 // TODO: verify that this really preserves it
rlm@0 368 int old_dsp_time = m.dsp_time + m.spc_time;
rlm@0 369 m.dsp_time = end - m.spc_time + skipping_time;
rlm@0 370 end_frame( end );
rlm@0 371 m.dsp_time = m.dsp_time - skipping_time + old_dsp_time;
rlm@0 372
rlm@0 373 dsp.write( SPC_DSP::r_koff, m.skipped_koff & ~m.skipped_kon );
rlm@0 374 dsp.write( SPC_DSP::r_kon , m.skipped_kon );
rlm@0 375 clear_echo();
rlm@0 376 }
rlm@0 377 #endif
rlm@0 378
rlm@0 379 return play( count, 0 );
rlm@0 380 }