rlm@0: // SPC emulation support: init, sample buffering, reset, SPC loading
rlm@0: 
rlm@0: // snes_spc 0.9.0. http://www.slack.net/~ant/
rlm@0: 
rlm@0: #include "SNES_SPC.h"
rlm@0: 
rlm@0: #include <string.h>
rlm@0: 
rlm@0: /* Copyright (C) 2004-2007 Shay Green. This module is free software; you
rlm@0: can redistribute it and/or modify it under the terms of the GNU Lesser
rlm@0: General Public License as published by the Free Software Foundation; either
rlm@0: version 2.1 of the License, or (at your option) any later version. This
rlm@0: module is distributed in the hope that it will be useful, but WITHOUT ANY
rlm@0: WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
rlm@0: FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
rlm@0: details. You should have received a copy of the GNU Lesser General Public
rlm@0: License along with this module; if not, write to the Free Software Foundation,
rlm@0: Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
rlm@0: 
rlm@0: #include "blargg_source.h"
rlm@0: 
rlm@0: #define RAM         (m.ram.ram)
rlm@0: #define REGS        (m.smp_regs [0])
rlm@0: #define REGS_IN     (m.smp_regs [1])
rlm@0: 
rlm@0: // (n ? n : 256)
rlm@0: #define IF_0_THEN_256( n ) ((uint8_t) ((n) - 1) + 1)
rlm@0: 
rlm@0: 
rlm@0: //// Init
rlm@0: 
rlm@0: blargg_err_t SNES_SPC::init()
rlm@0: {
rlm@0: 	memset( &m, 0, sizeof m );
rlm@0: 	dsp.init( RAM );
rlm@0: 	
rlm@0: 	m.tempo = tempo_unit;
rlm@0: 	
rlm@0: 	// Most SPC music doesn't need ROM, and almost all the rest only rely
rlm@0: 	// on these two bytes
rlm@0: 	m.rom [0x3E] = 0xFF;
rlm@0: 	m.rom [0x3F] = 0xC0;
rlm@0: 	
rlm@0: 	static unsigned char const cycle_table [128] =
rlm@0: 	{//   01   23   45   67   89   AB   CD   EF
rlm@0: 	    0x28,0x47,0x34,0x36,0x26,0x54,0x54,0x68, // 0
rlm@0: 	    0x48,0x47,0x45,0x56,0x55,0x65,0x22,0x46, // 1
rlm@0: 	    0x28,0x47,0x34,0x36,0x26,0x54,0x54,0x74, // 2
rlm@0: 	    0x48,0x47,0x45,0x56,0x55,0x65,0x22,0x38, // 3
rlm@0: 	    0x28,0x47,0x34,0x36,0x26,0x44,0x54,0x66, // 4
rlm@0: 	    0x48,0x47,0x45,0x56,0x55,0x45,0x22,0x43, // 5
rlm@0: 	    0x28,0x47,0x34,0x36,0x26,0x44,0x54,0x75, // 6
rlm@0: 	    0x48,0x47,0x45,0x56,0x55,0x55,0x22,0x36, // 7
rlm@0: 	    0x28,0x47,0x34,0x36,0x26,0x54,0x52,0x45, // 8
rlm@0: 	    0x48,0x47,0x45,0x56,0x55,0x55,0x22,0xC5, // 9
rlm@0: 	    0x38,0x47,0x34,0x36,0x26,0x44,0x52,0x44, // A
rlm@0: 	    0x48,0x47,0x45,0x56,0x55,0x55,0x22,0x34, // B
rlm@0: 	    0x38,0x47,0x45,0x47,0x25,0x64,0x52,0x49, // C
rlm@0: 	    0x48,0x47,0x56,0x67,0x45,0x55,0x22,0x83, // D
rlm@0: 	    0x28,0x47,0x34,0x36,0x24,0x53,0x43,0x40, // E
rlm@0: 	    0x48,0x47,0x45,0x56,0x34,0x54,0x22,0x60, // F
rlm@0: 	};
rlm@0: 	
rlm@0: 	// unpack cycle table
rlm@0: 	for ( int i = 0; i < 128; i++ )
rlm@0: 	{
rlm@0: 		int n = cycle_table [i];
rlm@0: 		m.cycle_table [i * 2 + 0] = n >> 4;
rlm@0: 		m.cycle_table [i * 2 + 1] = n & 0x0F;
rlm@0: 	}
rlm@0: 	
rlm@0: 	#if SPC_LESS_ACCURATE
rlm@0: 		memcpy( reg_times, reg_times_, sizeof reg_times );
rlm@0: 	#endif
rlm@0: 	
rlm@0: 	reset();
rlm@0: 	return 0;
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::init_rom( uint8_t const in [rom_size] )
rlm@0: {
rlm@0: 	memcpy( m.rom, in, sizeof m.rom );
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::set_tempo( int t )
rlm@0: {
rlm@0: 	m.tempo = t;
rlm@0: 	int const timer2_shift = 4; // 64 kHz
rlm@0: 	int const other_shift  = 3; //  8 kHz
rlm@0: 	
rlm@0: 	#if SPC_DISABLE_TEMPO
rlm@0: 		m.timers [2].prescaler = timer2_shift;
rlm@0: 		m.timers [1].prescaler = timer2_shift + other_shift;
rlm@0: 		m.timers [0].prescaler = timer2_shift + other_shift;
rlm@0: 	#else
rlm@0: 		if ( !t )
rlm@0: 			t = 1;
rlm@0: 		int const timer2_rate  = 1 << timer2_shift;
rlm@0: 		int rate = (timer2_rate * tempo_unit + (t >> 1)) / t;
rlm@0: 		if ( rate < timer2_rate / 4 )
rlm@0: 			rate = timer2_rate / 4; // max 4x tempo
rlm@0: 		m.timers [2].prescaler = rate;
rlm@0: 		m.timers [1].prescaler = rate << other_shift;
rlm@0: 		m.timers [0].prescaler = rate << other_shift;
rlm@0: 	#endif
rlm@0: }
rlm@0: 
rlm@0: // Timer registers have been loaded. Applies these to the timers. Does not
rlm@0: // reset timer prescalers or dividers.
rlm@0: void SNES_SPC::timers_loaded()
rlm@0: {
rlm@0: 	int i;
rlm@0: 	for ( i = 0; i < timer_count; i++ )
rlm@0: 	{
rlm@0: 		Timer* t = &m.timers [i];
rlm@0: 		t->period  = IF_0_THEN_256( REGS [r_t0target + i] );
rlm@0: 		t->enabled = REGS [r_control] >> i & 1;
rlm@0: 		t->counter = REGS_IN [r_t0out + i] & 0x0F;
rlm@0: 	}
rlm@0: 	
rlm@0: 	set_tempo( m.tempo );
rlm@0: }
rlm@0: 
rlm@0: // Loads registers from unified 16-byte format
rlm@0: void SNES_SPC::load_regs( uint8_t const in [reg_count] )
rlm@0: {
rlm@0: 	memcpy( REGS, in, reg_count );
rlm@0: 	memcpy( REGS_IN, REGS, reg_count );
rlm@0: 	
rlm@0: 	// These always read back as 0
rlm@0: 	REGS_IN [r_test    ] = 0;
rlm@0: 	REGS_IN [r_control ] = 0;
rlm@0: 	REGS_IN [r_t0target] = 0;
rlm@0: 	REGS_IN [r_t1target] = 0;
rlm@0: 	REGS_IN [r_t2target] = 0;
rlm@0: }
rlm@0: 
rlm@0: // RAM was just loaded from SPC, with $F0-$FF containing SMP registers
rlm@0: // and timer counts. Copies these to proper registers.
rlm@0: void SNES_SPC::ram_loaded()
rlm@0: {
rlm@0: 	m.rom_enabled = 0;
rlm@0: 	load_regs( &RAM [0xF0] );
rlm@0: 	
rlm@0: 	// Put STOP instruction around memory to catch PC underflow/overflow
rlm@0: 	memset( m.ram.padding1, cpu_pad_fill, sizeof m.ram.padding1 );
rlm@0: 	memset( m.ram.padding2, cpu_pad_fill, sizeof m.ram.padding2 );
rlm@0: }
rlm@0: 
rlm@0: // Registers were just loaded. Applies these new values.
rlm@0: void SNES_SPC::regs_loaded()
rlm@0: {
rlm@0: 	enable_rom( REGS [r_control] & 0x80 );
rlm@0: 	timers_loaded();
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::reset_time_regs()
rlm@0: {
rlm@0: 	m.cpu_error     = 0;
rlm@0: 	m.echo_accessed = 0;
rlm@0: 	m.spc_time      = 0;
rlm@0: 	m.dsp_time      = 0;
rlm@0: 	#if SPC_LESS_ACCURATE
rlm@0: 		m.dsp_time = clocks_per_sample + 1;
rlm@0: 	#endif
rlm@0: 	
rlm@0: 	for ( int i = 0; i < timer_count; i++ )
rlm@0: 	{
rlm@0: 		Timer* t = &m.timers [i];
rlm@0: 		t->next_time = 1;
rlm@0: 		t->divider   = 0;
rlm@0: 	}
rlm@0: 	
rlm@0: 	regs_loaded();
rlm@0: 	
rlm@0: 	m.extra_clocks = 0;
rlm@0: 	reset_buf();
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::reset_common( int timer_counter_init )
rlm@0: {
rlm@0: 	int i;
rlm@0: 	for ( i = 0; i < timer_count; i++ )
rlm@0: 		REGS_IN [r_t0out + i] = timer_counter_init;
rlm@0: 	
rlm@0: 	// Run IPL ROM
rlm@0: 	memset( &m.cpu_regs, 0, sizeof m.cpu_regs );
rlm@0: 	m.cpu_regs.pc = rom_addr;
rlm@0: 	
rlm@0: 	REGS [r_test   ] = 0x0A;
rlm@0: 	REGS [r_control] = 0xB0; // ROM enabled, clear ports
rlm@0: 	for ( i = 0; i < port_count; i++ )
rlm@0: 		REGS_IN [r_cpuio0 + i] = 0;
rlm@0: 	
rlm@0: 	reset_time_regs();
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::soft_reset()
rlm@0: {
rlm@0: 	reset_common( 0 );
rlm@0: 	dsp.soft_reset();
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::reset()
rlm@0: {
rlm@0: 	memset( RAM, 0xFF, 0x10000 );
rlm@0: 	ram_loaded();
rlm@0: 	reset_common( 0x0F );
rlm@0: 	dsp.reset();
rlm@0: }
rlm@0: 
rlm@0: char const SNES_SPC::signature [signature_size + 1] =
rlm@0: 		"SNES-SPC700 Sound File Data v0.30\x1A\x1A";
rlm@0: 
rlm@0: blargg_err_t SNES_SPC::load_spc( void const* data, long size )
rlm@0: {
rlm@0: 	spc_file_t const* const spc = (spc_file_t const*) data;
rlm@0: 	
rlm@0: 	// be sure compiler didn't insert any padding into fle_t
rlm@0: 	assert( sizeof (spc_file_t) == spc_min_file_size + 0x80 );
rlm@0: 	
rlm@0: 	// Check signature and file size
rlm@0: 	if ( size < signature_size || memcmp( spc, signature, 27 ) )
rlm@0: 		return "Not an SPC file";
rlm@0: 	
rlm@0: 	if ( size < spc_min_file_size )
rlm@0: 		return "Corrupt SPC file";
rlm@0: 	
rlm@0: 	// CPU registers
rlm@0: 	m.cpu_regs.pc  = spc->pch * 0x100 + spc->pcl;
rlm@0: 	m.cpu_regs.a   = spc->a;
rlm@0: 	m.cpu_regs.x   = spc->x;
rlm@0: 	m.cpu_regs.y   = spc->y;
rlm@0: 	m.cpu_regs.psw = spc->psw;
rlm@0: 	m.cpu_regs.sp  = spc->sp;
rlm@0: 	
rlm@0: 	// RAM and registers
rlm@0: 	memcpy( RAM, spc->ram, 0x10000 );
rlm@0: 	ram_loaded();
rlm@0: 	
rlm@0: 	// DSP registers
rlm@0: 	dsp.load( spc->dsp );
rlm@0: 	
rlm@0: 	reset_time_regs();
rlm@0: 	
rlm@0: 	return 0;
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::clear_echo()
rlm@0: {
rlm@0: 	if ( !(dsp.read( SPC_DSP::r_flg ) & 0x20) )
rlm@0: 	{
rlm@0: 		int addr = 0x100 * dsp.read( SPC_DSP::r_esa );
rlm@0: 		int end  = addr + 0x800 * (dsp.read( SPC_DSP::r_edl ) & 0x0F);
rlm@0: 		if ( end > 0x10000 )
rlm@0: 			end = 0x10000;
rlm@0: 		memset( &RAM [addr], 0xFF, end - addr );
rlm@0: 	}
rlm@0: }
rlm@0: 
rlm@0: 
rlm@0: //// Sample output
rlm@0: 
rlm@0: void SNES_SPC::reset_buf()
rlm@0: {
rlm@0: 	// Start with half extra buffer of silence
rlm@0: 	sample_t* out = m.extra_buf;
rlm@0: 	while ( out < &m.extra_buf [extra_size / 2] )
rlm@0: 		*out++ = 0;
rlm@0: 	
rlm@0: 	m.extra_pos = out;
rlm@0: 	m.buf_begin = 0;
rlm@0: 	
rlm@0: 	dsp.set_output( 0, 0 );
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::set_output( sample_t* out, int size )
rlm@0: {
rlm@0: 	require( (size & 1) == 0 ); // size must be even
rlm@0: 	
rlm@0: 	m.extra_clocks &= clocks_per_sample - 1;
rlm@0: 	if ( out )
rlm@0: 	{
rlm@0: 		sample_t const* out_end = out + size;
rlm@0: 		m.buf_begin = out;
rlm@0: 		m.buf_end   = out_end;
rlm@0: 		
rlm@0: 		// Copy extra to output
rlm@0: 		sample_t const* in = m.extra_buf;
rlm@0: 		while ( in < m.extra_pos && out < out_end )
rlm@0: 			*out++ = *in++;
rlm@0: 		
rlm@0: 		// Handle output being full already
rlm@0: 		if ( out >= out_end )
rlm@0: 		{
rlm@0: 			// Have DSP write to remaining extra space
rlm@0: 			out     = dsp.extra();
rlm@0: 			out_end = &dsp.extra() [extra_size];
rlm@0: 			
rlm@0: 			// Copy any remaining extra samples as if DSP wrote them
rlm@0: 			while ( in < m.extra_pos )
rlm@0: 				*out++ = *in++;
rlm@0: 			assert( out <= out_end );
rlm@0: 		}
rlm@0: 		
rlm@0: 		dsp.set_output( out, out_end - out );
rlm@0: 	}
rlm@0: 	else
rlm@0: 	{
rlm@0: 		reset_buf();
rlm@0: 	}
rlm@0: }
rlm@0: 
rlm@0: void SNES_SPC::save_extra()
rlm@0: {
rlm@0: 	// Get end pointers
rlm@0: 	sample_t const* main_end = m.buf_end;     // end of data written to buf
rlm@0: 	sample_t const* dsp_end  = dsp.out_pos(); // end of data written to dsp.extra()
rlm@0: 	if ( m.buf_begin <= dsp_end && dsp_end <= main_end )
rlm@0: 	{
rlm@0: 		main_end = dsp_end;
rlm@0: 		dsp_end  = dsp.extra(); // nothing in DSP's extra
rlm@0: 	}
rlm@0: 	
rlm@0: 	// Copy any extra samples at these ends into extra_buf
rlm@0: 	sample_t* out = m.extra_buf;
rlm@0: 	sample_t const* in;
rlm@0: 	for ( in = m.buf_begin + sample_count(); in < main_end; in++ )
rlm@0: 		*out++ = *in;
rlm@0: 	for ( in = dsp.extra(); in < dsp_end ; in++ )
rlm@0: 		*out++ = *in;
rlm@0: 	
rlm@0: 	m.extra_pos = out;
rlm@0: 	assert( out <= &m.extra_buf [extra_size] );
rlm@0: }
rlm@0: 
rlm@0: blargg_err_t SNES_SPC::play( int count, sample_t* out )
rlm@0: {
rlm@0: 	require( (count & 1) == 0 ); // must be even
rlm@0: 	if ( count )
rlm@0: 	{
rlm@0: 		set_output( out, count );
rlm@0: 		end_frame( count * (clocks_per_sample / 2) );
rlm@0: 	}
rlm@0: 	
rlm@0: 	const char* err = m.cpu_error;
rlm@0: 	m.cpu_error = 0;
rlm@0: 	return err;
rlm@0: }
rlm@0: 
rlm@0: blargg_err_t SNES_SPC::skip( int count )
rlm@0: {
rlm@0: 	#if SPC_LESS_ACCURATE
rlm@0: 	if ( count > 2 * sample_rate * 2 )
rlm@0: 	{
rlm@0: 		set_output( 0, 0 );
rlm@0: 		
rlm@0: 		// Skip a multiple of 4 samples
rlm@0: 		time_t end = count;
rlm@0: 		count = (count & 3) + 1 * sample_rate * 2;
rlm@0: 		end = (end - count) * (clocks_per_sample / 2);
rlm@0: 		
rlm@0: 		m.skipped_kon  = 0;
rlm@0: 		m.skipped_koff = 0;
rlm@0: 		
rlm@0: 		// Preserve DSP and timer synchronization
rlm@0: 		// TODO: verify that this really preserves it
rlm@0: 		int old_dsp_time = m.dsp_time + m.spc_time;
rlm@0: 		m.dsp_time = end - m.spc_time + skipping_time;
rlm@0: 		end_frame( end );
rlm@0: 		m.dsp_time = m.dsp_time - skipping_time + old_dsp_time;
rlm@0: 		
rlm@0: 		dsp.write( SPC_DSP::r_koff, m.skipped_koff & ~m.skipped_kon );
rlm@0: 		dsp.write( SPC_DSP::r_kon , m.skipped_kon );
rlm@0: 		clear_echo();
rlm@0: 	}
rlm@0: 	#endif
rlm@0: 	
rlm@0: 	return play( count, 0 );
rlm@0: }