view scripts/proc-trace.cfg @ 63:1d5cbb5343d2 pygar svn.64

[svn r64] mods to compile correctly for FPGA
author punk
date Mon, 10 May 2010 22:54:54 -0400
parents 90197e3375e2
children
line wrap: on
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1 #=========================================================================
2 # Trace-bsv.pl Config File
3 #
5 package settings;
7 #--------------------------------------------------------------------
8 # Trace Tags
9 #--------------------------------------------------------------------
11 $base = "mkCoreTH_wrapper.coreTH";
13 # This should be a hash of tags to what should be displayed if the
14 # tag is not present on a given cycle. The tags correspond to the
15 # trace tags used in the BSV source code.
17 %fields =
18 (
20 "mkProc:pc" => " ",
21 "mkProc:pcgen" => " ",
22 "mkProc:exec" => " ",
23 "mkProc:writeback" => " ",
24 "mkProc:exInstFull" => " ",
26 "mkInstCacheBlocking:reqTiny" => " ",
27 "mkInstCacheBlocking:respTiny" => " ",
28 "mkInstCacheBlocking:stage" => " ",
29 "mkInstCacheBlocking:hitMiss" => " ",
31 "mkDataCacheBlocking:reqTiny" => " ",
32 "mkDataCacheBlocking:respTiny" => " ",
33 "mkDataCacheBlocking:stage" => " ",
34 "mkDataCacheBlocking:hitMiss" => " ",
36 "mkMemArb:req0" => " ",
37 "mkMemArb:req1" => " ",
38 "mkMemArb:resp" => " ",
40 );
42 %headers =
43 (
45 "mkProc:pc" => "pc ",
46 "mkProc:pcgen" => "stage",
47 "mkProc:exec" => "",
48 "mkProc:writeback" => "",
49 "mkProc:exInstFull" => "exInst ",
51 "mkInstCacheBlocking:reqTiny" => "req",
52 "mkInstCacheBlocking:respTiny" => "resp",
53 "mkInstCacheBlocking:stage" => "stage",
54 "mkInstCacheBlocking:hitMiss" => "hit/miss",
56 "mkDataCacheBlocking:reqTiny" => "req",
57 "mkDataCacheBlocking:respTiny" => "resp",
58 "mkDataCacheBlocking:stage" => "stage",
59 "mkDataCacheBlocking:hitMiss" => "hit/miss",
61 "mkMemArb:req0" => "req0",
62 "mkMemArb:req1" => "req1",
63 "mkMemArb:resp" => "req2",
65 );
68 #--------------------------------------------------------------------
69 # Trace String
70 #--------------------------------------------------------------------
72 # For the processor we display the PC and what stage we are in.
74 $proc = "pc={mkProc:pc} [{mkProc:pcgen}|{mkProc:exec}|{mkProc:writeback}]";
75 $procl = "{mkProc:pc} [{mkProc:pcgen}{mkProc:exec}{mkProc:writeback}]";
77 # For the caches we display the current request and response,
78 # the current cache stage, whether or not the access is a hit or a miss.
80 $icache = "[{mkInstCacheBlocking:reqTiny}|{mkInstCacheBlocking:respTiny}|".
81 "{mkInstCacheBlocking:stage}|{mkInstCacheBlocking:hitMiss}]";
83 $dcache = "[{mkDataCacheBlocking:reqTiny}|{mkDataCacheBlocking:respTiny}|".
84 "{mkDataCacheBlocking:stage}|{mkDataCacheBlocking:hitMiss}]";
86 # For the memory arbiter we display the two requests from the
87 # instruction and data caches and the response (which might be
88 # going to either cache)
90 $marb = "[{mkMemArb:req0}|{mkMemArb:req1}|{mkMemArb:resp}]";
92 # The trace string is used by bsv-trace.pl to for one line trace
93 # output. Basically the current value for a given tag is substituted
94 # into the trace string every cycle. If the tag is not present then
95 # the empty field is used form the %fields hash.
97 $traceString = "$proc $icache $dcache $marb {mkProc:exInstFull} ";
98 $labelString = "$procl $icache $dcache $marb {mkProc:exInstFull} ";