Mercurial > pygar
diff core/sim/bdir_dut/MemTypes.bi @ 1:91a1f76ddd62 pygar svn.2
[svn r2] Adding initial lab 5 source
author | punk |
---|---|
date | Tue, 13 Apr 2010 17:34:33 -0400 |
parents | |
children |
line wrap: on
line diff
1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 1.2 +++ b/core/sim/bdir_dut/MemTypes.bi Tue Apr 13 17:34:33 2010 -0400 1.3 @@ -0,0 +1,171 @@ 1.4 +signature MemTypes where { 1.5 +import ¶Counter®¶; 1.6 + 1.7 +import ¶FIFOF_®¶; 1.8 + 1.9 +import ¶FIFOF®¶; 1.10 + 1.11 +import ¶FIFO®¶; 1.12 + 1.13 +import ¶Inout®¶; 1.14 + 1.15 +import ¶List®¶; 1.16 + 1.17 +import ¶Clocks®¶; 1.18 + 1.19 +import ¶ListN®¶; 1.20 + 1.21 +import ¶PrimArray®¶; 1.22 + 1.23 +import ¶Vector®¶; 1.24 + 1.25 +import ¶Connectable®¶; 1.26 + 1.27 +import ¶GetPut®¶; 1.28 + 1.29 +import ¶ClientServer®¶; 1.30 + 1.31 +import Trace; 1.32 + 1.33 +data (MemTypes.MemReq :: # -> # -> # -> *) addrSz tagSz dataSz = 1.34 + MemTypes.LoadReq (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz) | 1.35 + MemTypes.StoreReq (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz); 1.36 + 1.37 +instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.MemReq addrSz tagSz dataSz); 1.38 + 1.39 +instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.MemReq addrSz tagSz dataSz); 1.40 + 1.41 +instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.MemReq addrSz tagSz dataSz); 1.42 + 1.43 +instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.MemReq addrSz tagSz dataSz); 1.44 + 1.45 +instance MemTypes (¶Prelude®¶.¶Add®¶ 1 _v103 _v100, 1.46 + ¶Prelude®¶.¶Max®¶ _v101 _v104 _v103, 1.47 + ¶Prelude®¶.¶Add®¶ _v105 _v104 _v103, 1.48 + ¶Prelude®¶.¶Add®¶ _v102 _v101 _v103, 1.49 + ¶Prelude®¶.¶Add®¶ addrSz _v106 _v104, 1.50 + ¶Prelude®¶.¶Add®¶ tagSz dataSz _v106, 1.51 + ¶Prelude®¶.¶Add®¶ addrSz tagSz _v101) => 1.52 + ¶Prelude®¶.¶Bits®¶ (MemTypes.MemReq addrSz tagSz dataSz) _v100; 1.53 + 1.54 +struct (MemTypes.¶MemReq_$LoadReq¶ :: # -> # -> # -> *) addrSz tagSz dataSz = { 1.55 + MemTypes.addr :: ¶Prelude®¶.¶Bit®¶ addrSz; 1.56 + MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz 1.57 +}; 1.58 + 1.59 +instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz); 1.60 + 1.61 +instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz); 1.62 + 1.63 +instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ 1.64 + (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz); 1.65 + 1.66 +instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz); 1.67 + 1.68 +instance MemTypes (¶Prelude®¶.¶Add®¶ _v101 _v104 _v100) => 1.69 + ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemReq_$LoadReq¶ _v101 _v104 dataSz) _v100; 1.70 + 1.71 +struct (MemTypes.¶MemReq_$StoreReq¶ :: # -> # -> # -> *) addrSz tagSz dataSz = { 1.72 + MemTypes.addr :: ¶Prelude®¶.¶Bit®¶ addrSz; 1.73 + MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz; 1.74 + MemTypes.¡data¡ :: ¶Prelude®¶.¶Bit®¶ dataSz 1.75 +}; 1.76 + 1.77 +instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz); 1.78 + 1.79 +instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz); 1.80 + 1.81 +instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ 1.82 + (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz); 1.83 + 1.84 +instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz); 1.85 + 1.86 +instance MemTypes (¶Prelude®¶.¶Add®¶ _v101 _v100 _v103, ¶Prelude®¶.¶Add®¶ _v104 _v107 _v100) => 1.87 + ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemReq_$StoreReq¶ _v101 _v104 _v107) _v103; 1.88 + 1.89 +data (MemTypes.MemResp :: # -> # -> *) tagSz dataSz = 1.90 + MemTypes.LoadResp (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz) | 1.91 + MemTypes.StoreResp (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz); 1.92 + 1.93 +instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.MemResp tagSz dataSz); 1.94 + 1.95 +instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.MemResp tagSz dataSz); 1.96 + 1.97 +instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.MemResp tagSz dataSz); 1.98 + 1.99 +instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.MemResp tagSz dataSz); 1.100 + 1.101 +instance MemTypes (¶Prelude®¶.¶Add®¶ 1 _v103 _v100, 1.102 + ¶Prelude®¶.¶Max®¶ _v101 _v104 _v103, 1.103 + ¶Prelude®¶.¶Add®¶ _v105 _v104 _v103, 1.104 + ¶Prelude®¶.¶Add®¶ _v102 _v101 _v103, 1.105 + ¶Prelude®¶.¶Add®¶ _v104 dataSz _v101) => 1.106 + ¶Prelude®¶.¶Bits®¶ (MemTypes.MemResp _v104 dataSz) _v100; 1.107 + 1.108 +struct (MemTypes.¶MemResp_$LoadResp¶ :: # -> # -> *) tagSz dataSz = { 1.109 + MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz; 1.110 + MemTypes.¡data¡ :: ¶Prelude®¶.¶Bit®¶ dataSz 1.111 +}; 1.112 + 1.113 +instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz); 1.114 + 1.115 +instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz); 1.116 + 1.117 +instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz); 1.118 + 1.119 +instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz); 1.120 + 1.121 +instance MemTypes (¶Prelude®¶.¶Add®¶ _v101 _v104 _v100) => 1.122 + ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemResp_$LoadResp¶ _v101 _v104) _v100; 1.123 + 1.124 +struct (MemTypes.¶MemResp_$StoreResp¶ :: # -> # -> *) tagSz dataSz = { 1.125 + MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz 1.126 +}; 1.127 + 1.128 +instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz); 1.129 + 1.130 +instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz); 1.131 + 1.132 +instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz); 1.133 + 1.134 +instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz); 1.135 + 1.136 +instance MemTypes ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemResp_$StoreResp¶ _v101 dataSz) _v101; 1.137 + 1.138 +type (MemTypes.AddrSz :: #) = 32; 1.139 + 1.140 +type (MemTypes.TagSz :: #) = 8; 1.141 + 1.142 +type (MemTypes.DataSz :: #) = 32; 1.143 + 1.144 +type (MemTypes.InstSz :: #) = 32; 1.145 + 1.146 +type (MemTypes.HostDataSz :: #) = 32; 1.147 + 1.148 +type (MemTypes.InstReq :: *) = MemTypes.MemReq MemTypes.AddrSz MemTypes.TagSz 0; 1.149 + 1.150 +type (MemTypes.InstResp :: *) = MemTypes.MemResp MemTypes.TagSz MemTypes.InstSz; 1.151 + 1.152 +type (MemTypes.DataReq :: *) = MemTypes.MemReq MemTypes.AddrSz MemTypes.TagSz MemTypes.DataSz; 1.153 + 1.154 +type (MemTypes.DataResp :: *) = MemTypes.MemResp MemTypes.TagSz MemTypes.DataSz; 1.155 + 1.156 +type (MemTypes.HostReq :: *) = MemTypes.MemReq MemTypes.AddrSz MemTypes.TagSz MemTypes.HostDataSz; 1.157 + 1.158 +type (MemTypes.HostResp :: *) = MemTypes.MemResp MemTypes.TagSz MemTypes.HostDataSz; 1.159 + 1.160 +type (MemTypes.MainMemAddrSz :: #) = 32; 1.161 + 1.162 +type (MemTypes.MainMemTagSz :: #) = 8; 1.163 + 1.164 +type (MemTypes.MainMemDataSz :: #) = 32; 1.165 + 1.166 +type (MemTypes.MainMemReq :: *) = 1.167 + MemTypes.MemReq MemTypes.MainMemAddrSz MemTypes.MainMemTagSz MemTypes.MainMemDataSz; 1.168 + 1.169 +type (MemTypes.MainMemResp :: *) = MemTypes.MemResp MemTypes.MainMemTagSz MemTypes.MainMemDataSz; 1.170 + 1.171 +instance MemTypes Trace.Traceable (MemTypes.MemReq a b c); 1.172 + 1.173 +instance MemTypes Trace.Traceable (MemTypes.MemResp a b) 1.174 +}