Mercurial > pygar
diff core/sim/bdir_dut/InstCacheBlocking.bi @ 1:91a1f76ddd62 pygar svn.2
[svn r2] Adding initial lab 5 source
author | punk |
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date | Tue, 13 Apr 2010 17:34:33 -0400 |
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1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 1.2 +++ b/core/sim/bdir_dut/InstCacheBlocking.bi Tue Apr 13 17:34:33 2010 -0400 1.3 @@ -0,0 +1,109 @@ 1.4 +signature InstCacheBlocking where { 1.5 +import ¶Assert®¶; 1.6 + 1.7 +import ¶Counter®¶; 1.8 + 1.9 +import ¶FIFOF_®¶; 1.10 + 1.11 +import ¶FIFOF®¶; 1.12 + 1.13 +import ¶FIFO®¶; 1.14 + 1.15 +import ¶Inout®¶; 1.16 + 1.17 +import ¶List®¶; 1.18 + 1.19 +import BFIFO; 1.20 + 1.21 +import ¶Clocks®¶; 1.22 + 1.23 +import ¶ListN®¶; 1.24 + 1.25 +import ¶PrimArray®¶; 1.26 + 1.27 +import ¶RWire®¶; 1.28 + 1.29 +import ¶RegFile®¶; 1.30 + 1.31 +import ¶Vector®¶; 1.32 + 1.33 +import ¶Connectable®¶; 1.34 + 1.35 +import ¶GetPut®¶; 1.36 + 1.37 +import ¶ClientServer®¶; 1.38 + 1.39 +import Trace; 1.40 + 1.41 +import MemTypes; 1.42 + 1.43 +import ProcTypes; 1.44 + 1.45 +interface (InstCacheBlocking.ICacheStats :: *) = { 1.46 + InstCacheBlocking.num_accesses :: ¶GetPut®¶.¶Get®¶ ProcTypes.Stat; 1.47 + InstCacheBlocking.num_misses :: ¶GetPut®¶.¶Get®¶ ProcTypes.Stat; 1.48 + InstCacheBlocking.num_evictions :: ¶GetPut®¶.¶Get®¶ ProcTypes.Stat 1.49 +}; 1.50 + 1.51 +instance InstCacheBlocking ¶Prelude®¶.¶PrimMakeUndefined®¶ InstCacheBlocking.ICacheStats; 1.52 + 1.53 +instance InstCacheBlocking ¶Prelude®¶.¶PrimDeepSeqCond®¶ InstCacheBlocking.ICacheStats; 1.54 + 1.55 +instance InstCacheBlocking ¶Prelude®¶.¶PrimMakeUninitialized®¶ InstCacheBlocking.ICacheStats; 1.56 + 1.57 +interface (InstCacheBlocking.ICache :: * -> * -> *) req_t resp_t = { 1.58 + InstCacheBlocking.proc_server :: ¶ClientServer®¶.¶Server®¶ req_t resp_t; 1.59 + InstCacheBlocking.mmem_client :: ¶ClientServer®¶.¶Client®¶ MemTypes.MainMemReq MemTypes.MainMemResp; 1.60 + InstCacheBlocking.statsEn_put :: ¶GetPut®¶.¶Put®¶ ¶Prelude®¶.¶Bool®¶; 1.61 + InstCacheBlocking.stats :: InstCacheBlocking.ICacheStats 1.62 +}; 1.63 + 1.64 +instance InstCacheBlocking (¶Prelude®¶.¶PrimMakeUndefined®¶ resp_t) => 1.65 + ¶Prelude®¶.¶PrimMakeUndefined®¶ (InstCacheBlocking.ICache req_t resp_t); 1.66 + 1.67 +instance InstCacheBlocking (¶Prelude®¶.¶PrimDeepSeqCond®¶ resp_t) => 1.68 + ¶Prelude®¶.¶PrimDeepSeqCond®¶ (InstCacheBlocking.ICache req_t resp_t); 1.69 + 1.70 +instance InstCacheBlocking ¶Prelude®¶.¶PrimMakeUninitialized®¶ 1.71 + (InstCacheBlocking.ICache req_t resp_t); 1.72 + 1.73 +type (InstCacheBlocking.CacheLineIndexSz :: #) = 10; 1.74 + 1.75 +type (InstCacheBlocking.CacheLineTagSz :: #) = 20; 1.76 + 1.77 +type (InstCacheBlocking.CacheLineSz :: #) = 32; 1.78 + 1.79 +type (InstCacheBlocking.CacheLineIndex :: *) = ¶Prelude®¶.¶Bit®¶ InstCacheBlocking.CacheLineIndexSz; 1.80 + 1.81 +type (InstCacheBlocking.CacheLineTag :: *) = ¶Prelude®¶.¶Bit®¶ InstCacheBlocking.CacheLineTagSz; 1.82 + 1.83 +type (InstCacheBlocking.CacheLine :: *) = ¶Prelude®¶.¶Bit®¶ InstCacheBlocking.CacheLineSz; 1.84 + 1.85 +data (InstCacheBlocking.CacheStage :: *) = 1.86 + InstCacheBlocking.Init () | 1.87 + InstCacheBlocking.Access () | 1.88 + InstCacheBlocking.Evict () | 1.89 + InstCacheBlocking.RefillReq () | 1.90 + InstCacheBlocking.RefillResp (); 1.91 + 1.92 +instance InstCacheBlocking ¶Prelude®¶.¶PrimMakeUndefined®¶ InstCacheBlocking.CacheStage; 1.93 + 1.94 +instance InstCacheBlocking ¶Prelude®¶.¶PrimDeepSeqCond®¶ InstCacheBlocking.CacheStage; 1.95 + 1.96 +instance InstCacheBlocking ¶Prelude®¶.¶PrimMakeUninitialized®¶ InstCacheBlocking.CacheStage; 1.97 + 1.98 +instance InstCacheBlocking ¶Prelude®¶.¶Eq®¶ InstCacheBlocking.CacheStage; 1.99 + 1.100 +instance InstCacheBlocking ¶Prelude®¶.¶Bits®¶ InstCacheBlocking.CacheStage 3; 1.101 + 1.102 +InstCacheBlocking.getAddr :: MemTypes.InstReq -> ¶Prelude®¶.¶Bit®¶ MemTypes.AddrSz; 1.103 + 1.104 +InstCacheBlocking.getCacheLineIndex :: MemTypes.InstReq -> InstCacheBlocking.CacheLineIndex; 1.105 + 1.106 +InstCacheBlocking.getCacheLineTag :: MemTypes.InstReq -> InstCacheBlocking.CacheLineTag; 1.107 + 1.108 +InstCacheBlocking.getCacheLineAddr :: MemTypes.InstReq -> ¶Prelude®¶.¶Bit®¶ MemTypes.AddrSz; 1.109 + 1.110 +InstCacheBlocking.mkInstCache :: (¶Prelude®¶.¶IsModule®¶ _m__ _c__) => 1.111 + _m__ (InstCacheBlocking.ICache MemTypes.InstReq MemTypes.InstResp) 1.112 +}