diff modules/bluespec/Pygar/core/audioCore.bsv @ 68:44cc00df1168 pygar svn.69

[svn r69] runs separate eofs (I think)
author punk
date Wed, 12 May 2010 00:06:05 -0400
parents cf8bb3038cbd
children
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line diff
     1.1 --- a/modules/bluespec/Pygar/core/audioCore.bsv	Tue May 11 23:23:21 2010 -0400
     1.2 +++ b/modules/bluespec/Pygar/core/audioCore.bsv	Wed May 12 00:06:05 2010 -0400
     1.3 @@ -40,6 +40,7 @@
     1.4  `include "asim/provides/data_cache.bsh"
     1.5  `include "asim/provides/processor.bsh"
     1.6  `include "asim/provides/audio_pipe_types.bsh"
     1.7 +`include "asim/provides/path_types.bsh"
     1.8  
     1.9  // Scratchpad includes
    1.10  `include "asim/provides/scratchpad_memory.bsh"
    1.11 @@ -48,17 +49,15 @@
    1.12  
    1.13  interface Core;
    1.14  
    1.15 -   interface Get#(AudioProcessorUnit) sampleOutput;
    1.16 -   interface Put#(AudioProcessorUnit) sampleInput;
    1.17 +   interface Get#(AudioStream) sampleOutput;
    1.18 +   interface Put#(AudioStream) sampleInput;
    1.19  	 
    1.20 -//   interface CPUToHost tohost;
    1.21 +   interface Get#(Bit#(32)) pc;
    1.22     
    1.23  endinterface
    1.24  
    1.25  module   [CONNECTED_MODULE]  mkCore#(Integer prog) ( Core );
    1.26 -   
    1.27 -
    1.28 -  // Instantiate the modules
    1.29 +     // Instantiate the modules
    1.30  
    1.31    Proc proc <- mkProc();
    1.32    ICache#(InstReq,InstResp) icache <- mkInstCache();
    1.33 @@ -108,6 +107,6 @@
    1.34     interface sampleOutput = proc.sampleOutput;
    1.35     interface sampleInput = proc.sampleInput;
    1.36  
    1.37 -//   interface CPUToHost tohost = proc.tohost;
    1.38 +   interface pc = proc.pcCount;
    1.39  
    1.40  endmodule