diff modules/bluespec/Pygar/lab4/DataCacheBlocking.bsv @ 63:1d5cbb5343d2 pygar svn.64

[svn r64] mods to compile correctly for FPGA
author punk
date Mon, 10 May 2010 22:54:54 -0400
parents 6179c07c21d7
children
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     1.1 --- a/modules/bluespec/Pygar/lab4/DataCacheBlocking.bsv	Mon May 10 21:00:49 2010 -0400
     1.2 +++ b/modules/bluespec/Pygar/lab4/DataCacheBlocking.bsv	Mon May 10 22:54:54 2010 -0400
     1.3 @@ -110,7 +110,7 @@
     1.4  
     1.5  (* doc = "synthesis attribute ram_style mkDataCache distributed;" *)
     1.6  (* synthesize *)
     1.7 -module [CONNECTED_MODULE] mkDataCache( DCache#(DataReq,DataResp) );
     1.8 +module mkDataCache( DCache#(DataReq,DataResp) );
     1.9  
    1.10    //-----------------------------------------------------------
    1.11    // State