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comparison modules/bluespec/Pygar/lab4/processor_library.awb @ 63:1d5cbb5343d2 pygar svn.64

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[svn r64] mods to compile correctly for FPGA
author punk
date Mon, 10 May 2010 22:54:54 -0400
parents 74d2fe78f36a
children
comparison
equal deleted inserted replaced
62:90fa9b289aab 63:1d5cbb5343d2
7 7
8 %public Trace.bsv BFIFO.bsv MemTypes.bsv FIFOUtility.bsv GetPutExt.bsv SFIFO.bsv CBUFF.bsv BRegFile.bsv BranchPred.bsv Divider.bsv 8 %public Trace.bsv BFIFO.bsv MemTypes.bsv FIFOUtility.bsv GetPutExt.bsv SFIFO.bsv CBUFF.bsv BRegFile.bsv BranchPred.bsv Divider.bsv
9 9
10 %generated -t VERILOG mkBRegFile.v 10 %generated -t VERILOG mkBRegFile.v
11 %generated -t BA mkBRegFile.ba 11 %generated -t BA mkBRegFile.ba
12