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comparison core/sim/bdir_dut/Core.bi @ 1:91a1f76ddd62 pygar svn.2

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[svn r2] Adding initial lab 5 source
author punk
date Tue, 13 Apr 2010 17:34:33 -0400
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0:6d1ff93e3afa 1:91a1f76ddd62
1 signature Core where {
2 import ¶Assert®¶;
3
4 import ¶ConfigReg®¶;
5
6 import ¶Counter®¶;
7
8 import ¶FIFOF_®¶;
9
10 import ¶FIFOF®¶;
11
12 import ¶FIFO®¶;
13
14 import ¶Inout®¶;
15
16 import ¶List®¶;
17
18 import BFIFO;
19
20 import ¶Clocks®¶;
21
22 import ¶ListN®¶;
23
24 import ¶Monad®¶;
25
26 import ¶PrimArray®¶;
27
28 import ¶RWire®¶;
29
30 import ¶RegFile®¶;
31
32 import SFIFO;
33
34 import ¶Vector®¶;
35
36 import ¶Connectable®¶;
37
38 import ¶GetPut®¶;
39
40 import ¶ClientServer®¶;
41
42 import Trace;
43
44 import MemTypes;
45
46 import MemArb;
47
48 import ProcTypes;
49
50 import BRegFile;
51
52 import BranchPred;
53
54 import DataCacheBlocking;
55
56 import InstCacheBlocking;
57
58 import Processor;
59
60 interface (Core.CoreStats :: *) = {
61 Core.dcache :: DataCacheBlocking.DCacheStats;
62 Core.icache :: InstCacheBlocking.ICacheStats;
63 Core.proc :: Processor.ProcStats
64 };
65
66 instance Core ¶Prelude®¶.¶PrimMakeUndefined®¶ Core.CoreStats;
67
68 instance Core ¶Prelude®¶.¶PrimDeepSeqCond®¶ Core.CoreStats;
69
70 instance Core ¶Prelude®¶.¶PrimMakeUninitialized®¶ Core.CoreStats;
71
72 interface (Core.Core :: *) = {
73 Core.mmem_client :: ¶ClientServer®¶.¶Client®¶ MemTypes.MainMemReq MemTypes.MainMemResp;
74 Core.stats :: Core.CoreStats;
75 Core.tohost :: Processor.CPUToHost
76 };
77
78 instance Core ¶Prelude®¶.¶PrimMakeUndefined®¶ Core.Core;
79
80 instance Core ¶Prelude®¶.¶PrimDeepSeqCond®¶ Core.Core;
81
82 instance Core ¶Prelude®¶.¶PrimMakeUninitialized®¶ Core.Core;
83
84 Core.mkCore :: (¶Prelude®¶.¶IsModule®¶ _m__ _c__) => _m__ Core.Core
85 }