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comparison modules/bluespec/Pygar/core/audioPipe.bsv @ 33:2c8166d205d5 pygar svn.34

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[svn r34] uses scratchpad, set up for audio through c
author punk
date Tue, 04 May 2010 10:13:53 -0400
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32:0c775e733b81 33:2c8166d205d5
1 // The MIT License
2
3 // Copyright (c) 2009 Massachusetts Institute of Technology
4
5 // Permission is hereby granted, free of charge, to any person obtaining a copy
6 // of this software and associated documentation files (the "Software"), to deal
7 // in the Software without restriction, including without limitation the rights
8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 // copies of the Software, and to permit persons to whom the Software is
10 // furnished to do so, subject to the following conditions:
11
12 // The above copyright notice and this permission notice shall be included in
13 // all copies or substantial portions of the Software.
14
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 // THE SOFTWARE.
22
23 // Author: Kermin Fleming kfleming@mit.edu
24
25 import Connectable::*;
26 import GetPut::*;
27 import ClientServer::*;
28 import FIFO::*;
29 import SpecialFIFOs::*;
30
31 //AWB includes
32 `include "asim/provides/low_level_platform_interface.bsh"
33 `include "asim/provides/soft_connections.bsh"
34 `include "asim/provides/common_services.bsh"
35
36 //Local includes
37 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface
38 `include "asim/provides/core.bsh"
39 `include "asim/provides/processor_library.bsh"
40 `include "asim/provides/fpga_components.bsh"
41 `include "asim/provides/scratchpad_memory.bsh"
42 `include "asim/provides/mem_services.bsh"
43 `include "asim/dict/VDEV_SCRATCH.bsh"
44
45 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
46 //`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
47
48 function
49 module [CONNECTED_MODULE] mkConnectedApplication ();
50 Core core <- mkCore;
51 Reg#(int) cycle <- mkReg(0);
52
53
54 //get volumes
55 //mkMixer();
56
57 //External memory
58 // I'm not comfortable assuming that the memory subsystem is in order
59 // So I'll insert a completion buffer here.
60 MEMORY_IFC#(Bit#(18), Bit#(32)) memory <- mkScratchpad(`VDEV_SCRATCH_MEMORY, SCRATCHPAD_CACHED); //Services Memory items
61
62 // Services Samples
63 ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();
64 // Make this big enough so that several outstanding requests may be supported
65 FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8);
66
67 // this is for the tracing
68 rule printCycles;
69 cycle <= cycle+1;
70 $fdisplay(stderr, " => Cycle = %d", cycle);
71 endrule
72
73 rule sendMemReq;
74 let coreReq <- core.mmem_client.request.get;
75 case (coreReq) matches
76 tagged LoadReq .load: begin
77 //Allocate ROB space
78 memory.readReq(truncate(load.addr>>2));
79 tags.enq(load.tag);
80 end
81 tagged StoreReq .store: begin
82 memory.write(truncate(store.addr>>2),store.data);
83 end
84 endcase
85 endrule
86
87 rule receiveMemResp;
88 let memResp <- memory.readRsp();
89 tags.deq;
90 core.mmem_client.response.put(tagged LoadResp {data:memResp,
91 tag: tags.first});
92 endrule
93
94 rule feedOutput;
95 let pipelineData <- core.sampleOutput.get();
96 AudioProcessorControl endOfFileTag = EndOfFile;
97 AudioProcessorControl sampleTag = Data;
98
99 case (pipelineData) matches
100 tagged EndOfFile:
101 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
102 tagged Sample .sample:client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
103 endcase
104 endrule
105
106 endmodule