diff modules/bluespec/Pygar/core/audioPipe.bsv @ 33:2c8166d205d5 pygar svn.34

[svn r34] uses scratchpad, set up for audio through c
author punk
date Tue, 04 May 2010 10:13:53 -0400
parents
children
line wrap: on
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/modules/bluespec/Pygar/core/audioPipe.bsv	Tue May 04 10:13:53 2010 -0400
     1.3 @@ -0,0 +1,106 @@
     1.4 +// The MIT License
     1.5 +
     1.6 +// Copyright (c) 2009 Massachusetts Institute of Technology
     1.7 +
     1.8 +// Permission is hereby granted, free of charge, to any person obtaining a copy
     1.9 +// of this software and associated documentation files (the "Software"), to deal
    1.10 +// in the Software without restriction, including without limitation the rights
    1.11 +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    1.12 +// copies of the Software, and to permit persons to whom the Software is
    1.13 +// furnished to do so, subject to the following conditions:
    1.14 +
    1.15 +// The above copyright notice and this permission notice shall be included in
    1.16 +// all copies or substantial portions of the Software.
    1.17 +
    1.18 +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    1.19 +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    1.20 +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
    1.21 +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    1.22 +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    1.23 +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    1.24 +// THE SOFTWARE.
    1.25 +
    1.26 +// Author: Kermin Fleming kfleming@mit.edu
    1.27 +
    1.28 +import Connectable::*;
    1.29 +import GetPut::*;
    1.30 +import ClientServer::*;
    1.31 +import FIFO::*;
    1.32 +import SpecialFIFOs::*;
    1.33 +
    1.34 +//AWB includes
    1.35 +`include "asim/provides/low_level_platform_interface.bsh"
    1.36 +`include "asim/provides/soft_connections.bsh"
    1.37 +`include "asim/provides/common_services.bsh"
    1.38 +
    1.39 +//Local includes
    1.40 +`include "asim/provides/audio_pipe_types.bsh"  //provides Audio Pipeline interface
    1.41 +`include "asim/provides/core.bsh"
    1.42 +`include "asim/provides/processor_library.bsh"
    1.43 +`include "asim/provides/fpga_components.bsh"
    1.44 +`include "asim/provides/scratchpad_memory.bsh"
    1.45 +`include "asim/provides/mem_services.bsh"
    1.46 +`include "asim/dict/VDEV_SCRATCH.bsh"
    1.47 +
    1.48 +`include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
    1.49 +//`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
    1.50 +
    1.51 +function 
    1.52 +module [CONNECTED_MODULE] mkConnectedApplication ();
    1.53 +   Core core <- mkCore;
    1.54 +   Reg#(int) cycle <- mkReg(0);
    1.55 +
    1.56 +   
    1.57 +   //get volumes
    1.58 +   //mkMixer();
    1.59 +   
    1.60 +  //External memory 
    1.61 +  // I'm not comfortable assuming that the memory subsystem is in order  
    1.62 +  // So I'll insert a completion buffer here.
    1.63 +  MEMORY_IFC#(Bit#(18), Bit#(32)) memory <- mkScratchpad(`VDEV_SCRATCH_MEMORY, SCRATCHPAD_CACHED);   //Services Memory items
    1.64 +
    1.65 +  // Services Samples 
    1.66 +  ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();   
    1.67 +  // Make this big enough so that several outstanding requests may be supported
    1.68 +  FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8);
    1.69 +
    1.70 +  // this is for the tracing
    1.71 +  rule printCycles;
    1.72 +    cycle <= cycle+1;
    1.73 +    $fdisplay(stderr, " => Cycle = %d", cycle);
    1.74 +  endrule
    1.75 +
    1.76 +  rule sendMemReq;
    1.77 +    let coreReq <- core.mmem_client.request.get;
    1.78 +    case (coreReq) matches 
    1.79 +      tagged LoadReq .load: begin
    1.80 +                              //Allocate ROB space
    1.81 +                              memory.readReq(truncate(load.addr>>2));
    1.82 +                              tags.enq(load.tag);
    1.83 +                            end
    1.84 +      tagged StoreReq .store: begin
    1.85 +	                      memory.write(truncate(store.addr>>2),store.data);
    1.86 +                              end
    1.87 +    endcase
    1.88 +  endrule
    1.89 +  
    1.90 +  rule receiveMemResp;
    1.91 +    let memResp <- memory.readRsp();
    1.92 +    tags.deq;
    1.93 +    core.mmem_client.response.put(tagged LoadResp {data:memResp,
    1.94 +                                                   tag: tags.first});
    1.95 +  endrule
    1.96 +
    1.97 +   rule feedOutput;
    1.98 +     let pipelineData <- core.sampleOutput.get();
    1.99 +     AudioProcessorControl endOfFileTag = EndOfFile;
   1.100 +     AudioProcessorControl sampleTag = Data;
   1.101 +
   1.102 +     case (pipelineData) matches
   1.103 +       tagged EndOfFile: 
   1.104 +       client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
   1.105 +       tagged Sample .sample:client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
   1.106 +     endcase
   1.107 +   endrule
   1.108 +
   1.109 +endmodule