pygar: common/Mixer.bsv annotate

[svn r64] mods to compile correctly for FPGA

rev	line source
rlm@2	1 import FIFOF::*;
rlm@2	2 import FIFO::*;
rlm@2	3
rlm@2	4
rlm@2	5 interface Mixer;
rlm@2	6 method Action feed(Sample samp, VoiceId id); // feed in a sample to a specific FIFOF
rlm@2	7 method Action stream(); // Outputs muxed data.
rlm@2	8 endinterface
rlm@2	9
rlm@2	10
rlm@2	11 method vectorFull?(Vector#(FIFOF#(Sample)) vect)
rlm@2	12
rlm@2	13 (reduce .notEmpty vect)
rlm@2	14
rlm@2	15 endmethod
rlm@2	16
rlm@2	17
rlm@2	18
rlm@2	19 module mkMixer(Mixer);
rlm@2	20
rlm@2	21 FIFO output = mkFIFO();
rlm@2	22
rlm@2	23
rlm@2	24 // make vector of fifos, length = MAX_VOICES
rlm@2	25 fifo_vect Vector#(FIFOF#(Sample)) = mkVector(`MAX_VOICES);
rlm@2	26
rlm@2	27
rlm@2	28 for $i(1 .. `MAX_VOICES)
rlm@2	29 begin
rlm@2	30 fifo_vect[$i] = mkFIFOF();
rlm@2	31 end
rlm@2	32
rlm@2	33 rule(vectorFull?(fifo_vect))
rlm@2	34
rlm@6	35 Sample out = (/ (reduce + fifo_vector) (log `MAX_VOICES))
rlm@2	36 output.enq(out);
rlm@2	37
rlm@2	38 endrule
rlm@2	39
rlm@2	40
rlm@2	41 endmodule
rlm@2	42

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