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1 // The MIT License
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2
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3 // Copyright (c) 2009 Massachusetts Institute of Technology
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4
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5 // Permission is hereby granted, free of charge, to any person obtaining a copy
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6 // of this software and associated documentation files (the "Software"), to deal
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7 // in the Software without restriction, including without limitation the rights
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8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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9 // copies of the Software, and to permit persons to whom the Software is
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10 // furnished to do so, subject to the following conditions:
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11
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12 // The above copyright notice and this permission notice shall be included in
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13 // all copies or substantial portions of the Software.
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14
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15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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21 // THE SOFTWARE.
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22
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23 // Author: Kermin Fleming kfleming@mit.edu
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24
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25 import Connectable::*;
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26 import GetPut::*;
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27 import ClientServer::*;
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28 import FIFO::*;
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29 import SpecialFIFOs::*;
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30
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31 //AWB includes
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32 `include "asim/provides/low_level_platform_interface.bsh"
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33 `include "asim/provides/soft_connections.bsh"
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34 `include "asim/provides/common_services.bsh"
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35
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36 //Local includes
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37 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface
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38 `include "asim/provides/core.bsh"
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39 `include "asim/provides/processor_library.bsh"
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40 `include "asim/provides/fpga_components.bsh"
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41 `include "asim/provides/scratchpad_memory.bsh"
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42 `include "asim/provides/mem_services.bsh"
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43 `include "asim/dict/VDEV_SCRATCH.bsh"
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44
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45 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
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46 //`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
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47
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48 module [CONNECTED_MODULE] mkConnectedApplication ();
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49 Core core <- mkCore;
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50 Reg#(int) cycle <- mkReg(0);
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51
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52 //mkMixer();
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53
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54 //External memory
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55 // I'm not comfortable assuming that the memory subsystem is in order
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56 // So I'll insert a completion buffer here.
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57 MEMORY_IFC#(Bit#(18), Bit#(32)) memory <- mkScratchpad(`VDEV_SCRATCH_MEMORY, SCRATCHPAD_CACHED); //Services Memory items
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58
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59 // Services Samples
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60 ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();
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61 // Make this big enough so that several outstanding requests may be supported
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62 FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8);
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63
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64 // this is for the tracing
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65 rule printCycles;
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66 cycle <= cycle+1;
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67 $fdisplay(stderr, " => Cycle = %d", cycle);
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68 endrule
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69
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70 rule sendMemReq;
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71 let coreReq <- core.mmem_client.request.get;
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72 case (coreReq) matches
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73 tagged LoadReq .load: begin
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74 //Allocate ROB space
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75 memory.readReq(truncate(load.addr>>2));
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76 tags.enq(load.tag);
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77 end
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78 tagged StoreReq .store: begin
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79 memory.write(truncate(store.addr>>2),store.data);
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80 end
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81 endcase
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82 endrule
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83
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84 rule receiveMemResp;
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85 let memResp <- memory.readRsp();
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86 tags.deq;
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87 core.mmem_client.response.put(tagged LoadResp {data:memResp,
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88 tag: tags.first});
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89 endrule
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90
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91 rule feedOutput;
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92 let pipelineData <- core.sampleOutput.get();
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93 AudioProcessorControl endOfFileTag = EndOfFile;
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94 AudioProcessorControl sampleTag = Data;
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95
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96 case (pipelineData) matches
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97 tagged EndOfFile:
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98 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
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99 tagged Sample .sample:client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
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100 endcase
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101 endrule
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102
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103 endmodule
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