annotate modules/bluespec/Pygar/lab4/FPGATypes.bsv @ 23:90197e3375e2
pygar svn.24
[svn r24] added testing, but something is wrong with our c++ file.
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rlm |
| date |
Wed, 28 Apr 2010 08:19:09 -0400 |
| parents |
74716e9a81cc |
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line source |
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1 typedef 30 AvalonAddressWidth;
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2 typedef 32 AvalonDataWidth;
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3
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4 // need length + 1 spacing between CBusGet/Puts
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5 // Be warned - consider the word size of each address before
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6 // assigning new ones!!!
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7 // These are word addresses
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8 // Multiply by 4 to get byte address
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9 typedef 0 ToHostRegAddr;
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10 typedef 4 FromHostRegAddr;
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11 typedef 8 BreakpointRegAddr;
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12 typedef 12 BreakpointClearedAddr;
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13 typedef 16 PCRegAddr;
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14 typedef 20 StatsEnRegAddr;
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15 typedef 24 DCacheNumAccessesRegAddr;
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16 typedef 28 DCacheNumMissesRegAddr;
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17 typedef 32 DCacheNumWriteBacksRegAddr;
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18 typedef 36 ICacheNumAccessesRegAddr;
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19 typedef 40 ICacheNumMissesRegAddr;
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20 typedef 44 ICacheNumWriteBacksRegAddr;
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21 typedef 48 NumCyclesRegAddr;
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22 typedef 52 NumInstRegAddr;
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23 typedef 256 RegFileAddr; // The regfile is super long. Be careful of assigning conflicting addresses.
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24
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