annotate core/sim/bdir_dut/BRegFile.bi @ 25:220c14f5963c pygar svn.26

[svn r26] Not fully connected but passes audio successfully
author punk
date Wed, 28 Apr 2010 12:01:37 -0400
parents 91a1f76ddd62
children
rev   line source
punk@1 1 signature BRegFile where {
punk@1 2 import ¶Counter®¶;
punk@1 3
punk@1 4 import ¶FIFOF_®¶;
punk@1 5
punk@1 6 import ¶FIFOF®¶;
punk@1 7
punk@1 8 import ¶FIFO®¶;
punk@1 9
punk@1 10 import ¶Inout®¶;
punk@1 11
punk@1 12 import ¶List®¶;
punk@1 13
punk@1 14 import ¶Clocks®¶;
punk@1 15
punk@1 16 import ¶ListN®¶;
punk@1 17
punk@1 18 import ¶PrimArray®¶;
punk@1 19
punk@1 20 import ¶RWire®¶;
punk@1 21
punk@1 22 import ¶RegFile®¶;
punk@1 23
punk@1 24 import ¶Vector®¶;
punk@1 25
punk@1 26 import ¶Connectable®¶;
punk@1 27
punk@1 28 import ¶GetPut®¶;
punk@1 29
punk@1 30 import ¶ClientServer®¶;
punk@1 31
punk@1 32 import Trace;
punk@1 33
punk@1 34 import ProcTypes;
punk@1 35
punk@1 36 interface (BRegFile.BRegFile :: * -> * -> *) index_t data_t = {
punk@1 37 BRegFile.upd :: index_t -> data_t -> ¶Prelude®¶.¶Action®¶ {-# arg_names = [addr, ¡data¡] #-};
punk@1 38 BRegFile.sub :: index_t -> data_t {-# arg_names = [addr] #-}
punk@1 39 };
punk@1 40
punk@1 41 instance BRegFile (¶Prelude®¶.¶PrimMakeUndefined®¶ data_t) =>
punk@1 42 ¶Prelude®¶.¶PrimMakeUndefined®¶ (BRegFile.BRegFile index_t data_t);
punk@1 43
punk@1 44 instance BRegFile ¶Prelude®¶.¶PrimDeepSeqCond®¶ (BRegFile.BRegFile index_t data_t);
punk@1 45
punk@1 46 instance BRegFile ¶Prelude®¶.¶PrimMakeUninitialized®¶ (BRegFile.BRegFile index_t data_t);
punk@1 47
punk@1 48 BRegFile.mkBRegFile :: (¶Prelude®¶.¶Bounded®¶ index_t,
punk@1 49 ¶Prelude®¶.¶Eq®¶ index_t,
punk@1 50 ¶Prelude®¶.¶Bits®¶ data_t size_data,
punk@1 51 ¶Prelude®¶.¶Bits®¶ index_t size_index,
punk@1 52 ¶Prelude®¶.¶IsModule®¶ _m__ _c__) =>
punk@1 53 _m__ (¶RegFile®¶.¶RegFile®¶ index_t data_t)
punk@1 54 }