annotate fast_dsp/SPC_DSP.cpp @ 8:a37863126396

reordered error messages
author Robert McIntyre <rlm@mit.edu>
date Fri, 21 Oct 2011 07:26:53 -0700
parents e38dacceb958
children
rev   line source
rlm@0 1 // snes_spc 0.9.0. http://www.slack.net/~ant/
rlm@0 2
rlm@0 3 #include "SPC_DSP.h"
rlm@0 4
rlm@0 5 #include "blargg_endian.h"
rlm@0 6 #include <string.h>
rlm@0 7
rlm@0 8 /* Copyright (C) 2007 Shay Green. This module is free software; you
rlm@0 9 can redistribute it and/or modify it under the terms of the GNU Lesser
rlm@0 10 General Public License as published by the Free Software Foundation; either
rlm@0 11 version 2.1 of the License, or (at your option) any later version. This
rlm@0 12 module is distributed in the hope that it will be useful, but WITHOUT ANY
rlm@0 13 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
rlm@0 14 FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
rlm@0 15 details. You should have received a copy of the GNU Lesser General Public
rlm@0 16 License along with this module; if not, write to the Free Software Foundation,
rlm@0 17 Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
rlm@0 18
rlm@0 19 #include "blargg_source.h"
rlm@0 20
rlm@0 21 #ifdef BLARGG_ENABLE_OPTIMIZER
rlm@0 22 #include BLARGG_ENABLE_OPTIMIZER
rlm@0 23 #endif
rlm@0 24
rlm@0 25 #if INT_MAX < 0x7FFFFFFF
rlm@0 26 #error "Requires that int type have at least 32 bits"
rlm@0 27 #endif
rlm@0 28
rlm@0 29
rlm@0 30 // TODO: add to blargg_endian.h
rlm@0 31 #define GET_LE16SA( addr ) ((BOOST::int16_t) GET_LE16( addr ))
rlm@0 32 #define GET_LE16A( addr ) GET_LE16( addr )
rlm@0 33 #define SET_LE16A( addr, data ) SET_LE16( addr, data )
rlm@0 34
rlm@0 35 static BOOST::uint8_t const initial_regs [SPC_DSP::register_count] =
rlm@0 36 {
rlm@0 37 0x45,0x8B,0x5A,0x9A,0xE4,0x82,0x1B,0x78,0x00,0x00,0xAA,0x96,0x89,0x0E,0xE0,0x80,
rlm@0 38 0x2A,0x49,0x3D,0xBA,0x14,0xA0,0xAC,0xC5,0x00,0x00,0x51,0xBB,0x9C,0x4E,0x7B,0xFF,
rlm@0 39 0xF4,0xFD,0x57,0x32,0x37,0xD9,0x42,0x22,0x00,0x00,0x5B,0x3C,0x9F,0x1B,0x87,0x9A,
rlm@0 40 0x6F,0x27,0xAF,0x7B,0xE5,0x68,0x0A,0xD9,0x00,0x00,0x9A,0xC5,0x9C,0x4E,0x7B,0xFF,
rlm@0 41 0xEA,0x21,0x78,0x4F,0xDD,0xED,0x24,0x14,0x00,0x00,0x77,0xB1,0xD1,0x36,0xC1,0x67,
rlm@0 42 0x52,0x57,0x46,0x3D,0x59,0xF4,0x87,0xA4,0x00,0x00,0x7E,0x44,0x9C,0x4E,0x7B,0xFF,
rlm@0 43 0x75,0xF5,0x06,0x97,0x10,0xC3,0x24,0xBB,0x00,0x00,0x7B,0x7A,0xE0,0x60,0x12,0x0F,
rlm@0 44 0xF7,0x74,0x1C,0xE5,0x39,0x3D,0x73,0xC1,0x00,0x00,0x7A,0xB3,0xFF,0x4E,0x7B,0xFF
rlm@0 45 };
rlm@0 46
rlm@0 47 // if ( io < -32768 ) io = -32768;
rlm@0 48 // if ( io > 32767 ) io = 32767;
rlm@0 49 #define CLAMP16( io )\
rlm@0 50 {\
rlm@0 51 if ( (int16_t) io != io )\
rlm@0 52 io = (io >> 31) ^ 0x7FFF;\
rlm@0 53 }
rlm@0 54
rlm@0 55 // Access global DSP register
rlm@0 56 #define REG(n) m.regs [r_##n]
rlm@0 57
rlm@0 58 // Access voice DSP register
rlm@0 59 #define VREG(r,n) r [v_##n]
rlm@0 60
rlm@0 61 #define WRITE_SAMPLES( l, r, out ) \
rlm@0 62 {\
rlm@0 63 out [0] = l;\
rlm@0 64 out [1] = r;\
rlm@0 65 out += 2;\
rlm@0 66 if ( out >= m.out_end )\
rlm@0 67 {\
rlm@0 68 check( out == m.out_end );\
rlm@0 69 check( m.out_end != &m.extra [extra_size] || \
rlm@0 70 (m.extra <= m.out_begin && m.extra < &m.extra [extra_size]) );\
rlm@0 71 out = m.extra;\
rlm@0 72 m.out_end = &m.extra [extra_size];\
rlm@0 73 }\
rlm@0 74 }\
rlm@0 75
rlm@0 76 void SPC_DSP::set_output( sample_t* out, int size )
rlm@0 77 {
rlm@0 78 require( (size & 1) == 0 ); // must be even
rlm@0 79 if ( !out )
rlm@0 80 {
rlm@0 81 out = m.extra;
rlm@0 82 size = extra_size;
rlm@0 83 }
rlm@0 84 m.out_begin = out;
rlm@0 85 m.out = out;
rlm@0 86 m.out_end = out + size;
rlm@0 87 }
rlm@0 88
rlm@0 89 // Volume registers and efb are signed! Easy to forget int8_t cast.
rlm@0 90 // Prefixes are to avoid accidental use of locals with same names.
rlm@0 91
rlm@0 92 // Interleved gauss table (to improve cache coherency)
rlm@0 93 // interleved_gauss [i] = gauss [(i & 1) * 256 + 255 - (i >> 1 & 0xFF)]
rlm@0 94 static short const interleved_gauss [512] =
rlm@0 95 {
rlm@0 96 370,1305, 366,1305, 362,1304, 358,1304, 354,1304, 351,1304, 347,1304, 343,1303,
rlm@0 97 339,1303, 336,1303, 332,1302, 328,1302, 325,1301, 321,1300, 318,1300, 314,1299,
rlm@0 98 311,1298, 307,1297, 304,1297, 300,1296, 297,1295, 293,1294, 290,1293, 286,1292,
rlm@0 99 283,1291, 280,1290, 276,1288, 273,1287, 270,1286, 267,1284, 263,1283, 260,1282,
rlm@0 100 257,1280, 254,1279, 251,1277, 248,1275, 245,1274, 242,1272, 239,1270, 236,1269,
rlm@0 101 233,1267, 230,1265, 227,1263, 224,1261, 221,1259, 218,1257, 215,1255, 212,1253,
rlm@0 102 210,1251, 207,1248, 204,1246, 201,1244, 199,1241, 196,1239, 193,1237, 191,1234,
rlm@0 103 188,1232, 186,1229, 183,1227, 180,1224, 178,1221, 175,1219, 173,1216, 171,1213,
rlm@0 104 168,1210, 166,1207, 163,1205, 161,1202, 159,1199, 156,1196, 154,1193, 152,1190,
rlm@0 105 150,1186, 147,1183, 145,1180, 143,1177, 141,1174, 139,1170, 137,1167, 134,1164,
rlm@0 106 132,1160, 130,1157, 128,1153, 126,1150, 124,1146, 122,1143, 120,1139, 118,1136,
rlm@0 107 117,1132, 115,1128, 113,1125, 111,1121, 109,1117, 107,1113, 106,1109, 104,1106,
rlm@0 108 102,1102, 100,1098, 99,1094, 97,1090, 95,1086, 94,1082, 92,1078, 90,1074,
rlm@0 109 89,1070, 87,1066, 86,1061, 84,1057, 83,1053, 81,1049, 80,1045, 78,1040,
rlm@0 110 77,1036, 76,1032, 74,1027, 73,1023, 71,1019, 70,1014, 69,1010, 67,1005,
rlm@0 111 66,1001, 65, 997, 64, 992, 62, 988, 61, 983, 60, 978, 59, 974, 58, 969,
rlm@0 112 56, 965, 55, 960, 54, 955, 53, 951, 52, 946, 51, 941, 50, 937, 49, 932,
rlm@0 113 48, 927, 47, 923, 46, 918, 45, 913, 44, 908, 43, 904, 42, 899, 41, 894,
rlm@0 114 40, 889, 39, 884, 38, 880, 37, 875, 36, 870, 36, 865, 35, 860, 34, 855,
rlm@0 115 33, 851, 32, 846, 32, 841, 31, 836, 30, 831, 29, 826, 29, 821, 28, 816,
rlm@0 116 27, 811, 27, 806, 26, 802, 25, 797, 24, 792, 24, 787, 23, 782, 23, 777,
rlm@0 117 22, 772, 21, 767, 21, 762, 20, 757, 20, 752, 19, 747, 19, 742, 18, 737,
rlm@0 118 17, 732, 17, 728, 16, 723, 16, 718, 15, 713, 15, 708, 15, 703, 14, 698,
rlm@0 119 14, 693, 13, 688, 13, 683, 12, 678, 12, 674, 11, 669, 11, 664, 11, 659,
rlm@0 120 10, 654, 10, 649, 10, 644, 9, 640, 9, 635, 9, 630, 8, 625, 8, 620,
rlm@0 121 8, 615, 7, 611, 7, 606, 7, 601, 6, 596, 6, 592, 6, 587, 6, 582,
rlm@0 122 5, 577, 5, 573, 5, 568, 5, 563, 4, 559, 4, 554, 4, 550, 4, 545,
rlm@0 123 4, 540, 3, 536, 3, 531, 3, 527, 3, 522, 3, 517, 2, 513, 2, 508,
rlm@0 124 2, 504, 2, 499, 2, 495, 2, 491, 2, 486, 1, 482, 1, 477, 1, 473,
rlm@0 125 1, 469, 1, 464, 1, 460, 1, 456, 1, 451, 1, 447, 1, 443, 1, 439,
rlm@0 126 0, 434, 0, 430, 0, 426, 0, 422, 0, 418, 0, 414, 0, 410, 0, 405,
rlm@0 127 0, 401, 0, 397, 0, 393, 0, 389, 0, 385, 0, 381, 0, 378, 0, 374,
rlm@0 128 };
rlm@0 129
rlm@0 130
rlm@0 131 //// Counters
rlm@0 132
rlm@0 133 #define RATE( rate, div )\
rlm@0 134 (rate >= div ? rate / div * 8 - 1 : rate - 1)
rlm@0 135
rlm@0 136 static unsigned const counter_mask [32] =
rlm@0 137 {
rlm@0 138 RATE( 2,2), RATE(2048,4), RATE(1536,3),
rlm@0 139 RATE(1280,5), RATE(1024,4), RATE( 768,3),
rlm@0 140 RATE( 640,5), RATE( 512,4), RATE( 384,3),
rlm@0 141 RATE( 320,5), RATE( 256,4), RATE( 192,3),
rlm@0 142 RATE( 160,5), RATE( 128,4), RATE( 96,3),
rlm@0 143 RATE( 80,5), RATE( 64,4), RATE( 48,3),
rlm@0 144 RATE( 40,5), RATE( 32,4), RATE( 24,3),
rlm@0 145 RATE( 20,5), RATE( 16,4), RATE( 12,3),
rlm@0 146 RATE( 10,5), RATE( 8,4), RATE( 6,3),
rlm@0 147 RATE( 5,5), RATE( 4,4), RATE( 3,3),
rlm@0 148 RATE( 2,4),
rlm@0 149 RATE( 1,4)
rlm@0 150 };
rlm@0 151 #undef RATE
rlm@0 152
rlm@0 153 inline void SPC_DSP::init_counter()
rlm@0 154 {
rlm@0 155 // counters start out with this synchronization
rlm@0 156 m.counters [0] = 1;
rlm@0 157 m.counters [1] = 0;
rlm@0 158 m.counters [2] = -0x20u;
rlm@0 159 m.counters [3] = 0x0B;
rlm@0 160
rlm@0 161 int n = 2;
rlm@0 162 for ( int i = 1; i < 32; i++ )
rlm@0 163 {
rlm@0 164 m.counter_select [i] = &m.counters [n];
rlm@0 165 if ( !--n )
rlm@0 166 n = 3;
rlm@0 167 }
rlm@0 168 m.counter_select [ 0] = &m.counters [0];
rlm@0 169 m.counter_select [30] = &m.counters [2];
rlm@0 170 }
rlm@0 171
rlm@0 172 inline void SPC_DSP::run_counter( int i )
rlm@0 173 {
rlm@0 174 int n = m.counters [i];
rlm@0 175 if ( !(n-- & 7) )
rlm@0 176 n -= 6 - i;
rlm@0 177 m.counters [i] = n;
rlm@0 178 }
rlm@0 179
rlm@0 180 #define READ_COUNTER( rate )\
rlm@0 181 (*m.counter_select [rate] & counter_mask [rate])
rlm@0 182
rlm@0 183
rlm@0 184 //// Emulation
rlm@0 185
rlm@0 186 void SPC_DSP::run( int clock_count )
rlm@0 187 {
rlm@0 188 int new_phase = m.phase + clock_count;
rlm@0 189 int count = new_phase >> 5;
rlm@0 190 m.phase = new_phase & 31;
rlm@0 191 if ( !count )
rlm@0 192 return;
rlm@0 193
rlm@0 194 uint8_t* const ram = m.ram;
rlm@0 195 uint8_t const* const dir = &ram [REG(dir) * 0x100];
rlm@0 196 int const slow_gaussian = (REG(pmon) >> 1) | REG(non);
rlm@0 197 int const noise_rate = REG(flg) & 0x1F;
rlm@0 198
rlm@0 199 // Global volume
rlm@0 200 int mvoll = (int8_t) REG(mvoll);
rlm@0 201 int mvolr = (int8_t) REG(mvolr);
rlm@0 202 if ( mvoll * mvolr < m.surround_threshold )
rlm@0 203 mvoll = -mvoll; // eliminate surround
rlm@0 204
rlm@0 205 do
rlm@0 206 {
rlm@0 207 // KON/KOFF reading
rlm@0 208 if ( (m.every_other_sample ^= 1) != 0 )
rlm@0 209 {
rlm@0 210 m.new_kon &= ~m.kon;
rlm@0 211 m.kon = m.new_kon;
rlm@0 212 m.t_koff = REG(koff);
rlm@0 213 }
rlm@0 214
rlm@0 215 run_counter( 1 );
rlm@0 216 run_counter( 2 );
rlm@0 217 run_counter( 3 );
rlm@0 218
rlm@0 219 // Noise
rlm@0 220 if ( !READ_COUNTER( noise_rate ) )
rlm@0 221 {
rlm@0 222 int feedback = (m.noise << 13) ^ (m.noise << 14);
rlm@0 223 m.noise = (feedback & 0x4000) ^ (m.noise >> 1);
rlm@0 224 }
rlm@0 225
rlm@0 226 // Voices
rlm@0 227 int pmon_input = 0;
rlm@0 228 int main_out_l = 0;
rlm@0 229 int main_out_r = 0;
rlm@0 230 int echo_out_l = 0;
rlm@0 231 int echo_out_r = 0;
rlm@0 232 voice_t* v = m.voices;
rlm@0 233 uint8_t* v_regs = m.regs;
rlm@0 234 int vbit = 1;
rlm@0 235 do
rlm@0 236 {
rlm@0 237 #define SAMPLE_PTR(i) GET_LE16A( &dir [VREG(v_regs,srcn) * 4 + i * 2] )
rlm@0 238
rlm@0 239 int brr_header = ram [v->brr_addr];
rlm@0 240 int kon_delay = v->kon_delay;
rlm@0 241
rlm@0 242 // Pitch
rlm@0 243 int pitch = GET_LE16A( &VREG(v_regs,pitchl) ) & 0x3FFF;
rlm@0 244 if ( REG(pmon) & vbit )
rlm@0 245 pitch += ((pmon_input >> 5) * pitch) >> 10;
rlm@0 246
rlm@0 247 // KON phases
rlm@0 248 if ( --kon_delay >= 0 )
rlm@0 249 {
rlm@0 250 v->kon_delay = kon_delay;
rlm@0 251
rlm@0 252 // Get ready to start BRR decoding on next sample
rlm@0 253 if ( kon_delay == 4 )
rlm@0 254 {
rlm@0 255 v->brr_addr = SAMPLE_PTR( 0 );
rlm@0 256 v->brr_offset = 1;
rlm@0 257 v->buf_pos = v->buf;
rlm@0 258 brr_header = 0; // header is ignored on this sample
rlm@0 259 }
rlm@0 260
rlm@0 261 // Envelope is never run during KON
rlm@0 262 v->env = 0;
rlm@0 263 v->hidden_env = 0;
rlm@0 264
rlm@0 265 // Disable BRR decoding until last three samples
rlm@0 266 v->interp_pos = (kon_delay & 3 ? 0x4000 : 0);
rlm@0 267
rlm@0 268 // Pitch is never added during KON
rlm@0 269 pitch = 0;
rlm@0 270 }
rlm@0 271
rlm@0 272 int env = v->env;
rlm@0 273
rlm@0 274 // Gaussian interpolation
rlm@0 275 {
rlm@0 276 int output = 0;
rlm@0 277 VREG(v_regs,envx) = (uint8_t) (env >> 4);
rlm@0 278 if ( env )
rlm@0 279 {
rlm@0 280 // Make pointers into gaussian based on fractional position between samples
rlm@0 281 int offset = (unsigned) v->interp_pos >> 3 & 0x1FE;
rlm@0 282 short const* fwd = interleved_gauss + offset;
rlm@0 283 short const* rev = interleved_gauss + 510 - offset; // mirror left half of gaussian
rlm@0 284
rlm@0 285 int const* in = &v->buf_pos [(unsigned) v->interp_pos >> 12];
rlm@0 286
rlm@0 287 if ( !(slow_gaussian & vbit) ) // 99%
rlm@0 288 {
rlm@0 289 // Faster approximation when exact sample value isn't necessary for pitch mod
rlm@0 290 output = (fwd [0] * in [0] +
rlm@0 291 fwd [1] * in [1] +
rlm@0 292 rev [1] * in [2] +
rlm@0 293 rev [0] * in [3]) >> 11;
rlm@0 294 output = (output * env) >> 11;
rlm@0 295 }
rlm@0 296 else
rlm@0 297 {
rlm@0 298 output = (int16_t) (m.noise * 2);
rlm@0 299 if ( !(REG(non) & vbit) )
rlm@0 300 {
rlm@0 301 output = (fwd [0] * in [0]) >> 11;
rlm@0 302 output += (fwd [1] * in [1]) >> 11;
rlm@0 303 output += (rev [1] * in [2]) >> 11;
rlm@0 304 output = (int16_t) output;
rlm@0 305 output += (rev [0] * in [3]) >> 11;
rlm@0 306
rlm@0 307 CLAMP16( output );
rlm@0 308 output &= ~1;
rlm@0 309 }
rlm@0 310 output = (output * env) >> 11 & ~1;
rlm@0 311 }
rlm@0 312
rlm@0 313 // Output
rlm@0 314 int l = output * v->volume [0];
rlm@0 315 int r = output * v->volume [1];
rlm@0 316
rlm@0 317 main_out_l += l;
rlm@0 318 main_out_r += r;
rlm@0 319
rlm@0 320 if ( REG(eon) & vbit )
rlm@0 321 {
rlm@0 322 echo_out_l += l;
rlm@0 323 echo_out_r += r;
rlm@0 324 }
rlm@0 325 }
rlm@0 326
rlm@0 327 pmon_input = output;
rlm@0 328 VREG(v_regs,outx) = (uint8_t) (output >> 8);
rlm@0 329 }
rlm@0 330
rlm@0 331 // Soft reset or end of sample
rlm@0 332 if ( REG(flg) & 0x80 || (brr_header & 3) == 1 )
rlm@0 333 {
rlm@0 334 v->env_mode = env_release;
rlm@0 335 env = 0;
rlm@0 336 }
rlm@0 337
rlm@0 338 if ( m.every_other_sample )
rlm@0 339 {
rlm@0 340 // KOFF
rlm@0 341 if ( m.t_koff & vbit )
rlm@0 342 v->env_mode = env_release;
rlm@0 343
rlm@0 344 // KON
rlm@0 345 if ( m.kon & vbit )
rlm@0 346 {
rlm@0 347 v->kon_delay = 5;
rlm@0 348 v->env_mode = env_attack;
rlm@0 349 REG(endx) &= ~vbit;
rlm@0 350 }
rlm@0 351 }
rlm@0 352
rlm@0 353 // Envelope
rlm@0 354 if ( !v->kon_delay )
rlm@0 355 {
rlm@0 356 if ( v->env_mode == env_release ) // 97%
rlm@0 357 {
rlm@0 358 env -= 0x8;
rlm@0 359 v->env = env;
rlm@0 360 if ( env <= 0 )
rlm@0 361 {
rlm@0 362 v->env = 0;
rlm@0 363 goto skip_brr; // no BRR decoding for you!
rlm@0 364 }
rlm@0 365 }
rlm@0 366 else // 3%
rlm@0 367 {
rlm@0 368 int rate;
rlm@0 369 int const adsr0 = VREG(v_regs,adsr0);
rlm@0 370 int env_data = VREG(v_regs,adsr1);
rlm@0 371 if ( adsr0 >= 0x80 ) // 97% ADSR
rlm@0 372 {
rlm@0 373 if ( v->env_mode > env_decay ) // 89%
rlm@0 374 {
rlm@0 375 env--;
rlm@0 376 env -= env >> 8;
rlm@0 377 rate = env_data & 0x1F;
rlm@0 378
rlm@0 379 // optimized handling
rlm@0 380 v->hidden_env = env;
rlm@0 381 if ( READ_COUNTER( rate ) )
rlm@0 382 goto exit_env;
rlm@0 383 v->env = env;
rlm@0 384 goto exit_env;
rlm@0 385 }
rlm@0 386 else if ( v->env_mode == env_decay )
rlm@0 387 {
rlm@0 388 env--;
rlm@0 389 env -= env >> 8;
rlm@0 390 rate = (adsr0 >> 3 & 0x0E) + 0x10;
rlm@0 391 }
rlm@0 392 else // env_attack
rlm@0 393 {
rlm@0 394 rate = (adsr0 & 0x0F) * 2 + 1;
rlm@0 395 env += rate < 31 ? 0x20 : 0x400;
rlm@0 396 }
rlm@0 397 }
rlm@0 398 else // GAIN
rlm@0 399 {
rlm@0 400 int mode;
rlm@0 401 env_data = VREG(v_regs,gain);
rlm@0 402 mode = env_data >> 5;
rlm@0 403 if ( mode < 4 ) // direct
rlm@0 404 {
rlm@0 405 env = env_data * 0x10;
rlm@0 406 rate = 31;
rlm@0 407 }
rlm@0 408 else
rlm@0 409 {
rlm@0 410 rate = env_data & 0x1F;
rlm@0 411 if ( mode == 4 ) // 4: linear decrease
rlm@0 412 {
rlm@0 413 env -= 0x20;
rlm@0 414 }
rlm@0 415 else if ( mode < 6 ) // 5: exponential decrease
rlm@0 416 {
rlm@0 417 env--;
rlm@0 418 env -= env >> 8;
rlm@0 419 }
rlm@0 420 else // 6,7: linear increase
rlm@0 421 {
rlm@0 422 env += 0x20;
rlm@0 423 if ( mode > 6 && (unsigned) v->hidden_env >= 0x600 )
rlm@0 424 env += 0x8 - 0x20; // 7: two-slope linear increase
rlm@0 425 }
rlm@0 426 }
rlm@0 427 }
rlm@0 428
rlm@0 429 // Sustain level
rlm@0 430 if ( (env >> 8) == (env_data >> 5) && v->env_mode == env_decay )
rlm@0 431 v->env_mode = env_sustain;
rlm@0 432
rlm@0 433 v->hidden_env = env;
rlm@0 434
rlm@0 435 // unsigned cast because linear decrease going negative also triggers this
rlm@0 436 if ( (unsigned) env > 0x7FF )
rlm@0 437 {
rlm@0 438 env = (env < 0 ? 0 : 0x7FF);
rlm@0 439 if ( v->env_mode == env_attack )
rlm@0 440 v->env_mode = env_decay;
rlm@0 441 }
rlm@0 442
rlm@0 443 if ( !READ_COUNTER( rate ) )
rlm@0 444 v->env = env; // nothing else is controlled by the counter
rlm@0 445 }
rlm@0 446 }
rlm@0 447 exit_env:
rlm@0 448
rlm@0 449 {
rlm@0 450 // Apply pitch
rlm@0 451 int old_pos = v->interp_pos;
rlm@0 452 int interp_pos = (old_pos & 0x3FFF) + pitch;
rlm@0 453 if ( interp_pos > 0x7FFF )
rlm@0 454 interp_pos = 0x7FFF;
rlm@0 455 v->interp_pos = interp_pos;
rlm@0 456
rlm@0 457 // BRR decode if necessary
rlm@0 458 if ( old_pos >= 0x4000 )
rlm@0 459 {
rlm@0 460 // Arrange the four input nybbles in 0xABCD order for easy decoding
rlm@0 461 int nybbles = ram [(v->brr_addr + v->brr_offset) & 0xFFFF] * 0x100 +
rlm@0 462 ram [(v->brr_addr + v->brr_offset + 1) & 0xFFFF];
rlm@0 463
rlm@0 464 // Advance read position
rlm@0 465 int const brr_block_size = 9;
rlm@0 466 int brr_offset = v->brr_offset;
rlm@0 467 if ( (brr_offset += 2) >= brr_block_size )
rlm@0 468 {
rlm@0 469 // Next BRR block
rlm@0 470 int brr_addr = (v->brr_addr + brr_block_size) & 0xFFFF;
rlm@0 471 assert( brr_offset == brr_block_size );
rlm@0 472 if ( brr_header & 1 )
rlm@0 473 {
rlm@0 474 brr_addr = SAMPLE_PTR( 1 );
rlm@0 475 if ( !v->kon_delay )
rlm@0 476 REG(endx) |= vbit;
rlm@0 477 }
rlm@0 478 v->brr_addr = brr_addr;
rlm@0 479 brr_offset = 1;
rlm@0 480 }
rlm@0 481 v->brr_offset = brr_offset;
rlm@0 482
rlm@0 483 // Decode
rlm@0 484
rlm@0 485 // 0: >>1 1: <<0 2: <<1 ... 12: <<11 13-15: >>4 <<11
rlm@0 486 static unsigned char const shifts [16 * 2] = {
rlm@0 487 13,12,12,12,12,12,12,12,12,12,12, 12, 12, 16, 16, 16,
rlm@0 488 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 11, 11, 11
rlm@0 489 };
rlm@0 490 int const scale = brr_header >> 4;
rlm@0 491 int const right_shift = shifts [scale];
rlm@0 492 int const left_shift = shifts [scale + 16];
rlm@0 493
rlm@0 494 // Write to next four samples in circular buffer
rlm@0 495 int* pos = v->buf_pos;
rlm@0 496 int* end;
rlm@0 497
rlm@0 498 // Decode four samples
rlm@0 499 for ( end = pos + 4; pos < end; pos++, nybbles <<= 4 )
rlm@0 500 {
rlm@0 501 // Extract upper nybble and scale appropriately
rlm@0 502 int s = ((int16_t) nybbles >> right_shift) << left_shift;
rlm@0 503
rlm@0 504 // Apply IIR filter (8 is the most commonly used)
rlm@0 505 int const filter = brr_header & 0x0C;
rlm@0 506 int const p1 = pos [brr_buf_size - 1];
rlm@0 507 int const p2 = pos [brr_buf_size - 2] >> 1;
rlm@0 508 if ( filter >= 8 )
rlm@0 509 {
rlm@0 510 s += p1;
rlm@0 511 s -= p2;
rlm@0 512 if ( filter == 8 ) // s += p1 * 0.953125 - p2 * 0.46875
rlm@0 513 {
rlm@0 514 s += p2 >> 4;
rlm@0 515 s += (p1 * -3) >> 6;
rlm@0 516 }
rlm@0 517 else // s += p1 * 0.8984375 - p2 * 0.40625
rlm@0 518 {
rlm@0 519 s += (p1 * -13) >> 7;
rlm@0 520 s += (p2 * 3) >> 4;
rlm@0 521 }
rlm@0 522 }
rlm@0 523 else if ( filter ) // s += p1 * 0.46875
rlm@0 524 {
rlm@0 525 s += p1 >> 1;
rlm@0 526 s += (-p1) >> 5;
rlm@0 527 }
rlm@0 528
rlm@0 529 // Adjust and write sample
rlm@0 530 CLAMP16( s );
rlm@0 531 s = (int16_t) (s * 2);
rlm@0 532 pos [brr_buf_size] = pos [0] = s; // second copy simplifies wrap-around
rlm@0 533 }
rlm@0 534
rlm@0 535 if ( pos >= &v->buf [brr_buf_size] )
rlm@0 536 pos = v->buf;
rlm@0 537 v->buf_pos = pos;
rlm@0 538 }
rlm@0 539 }
rlm@0 540 skip_brr:
rlm@0 541 // Next voice
rlm@0 542 vbit <<= 1;
rlm@0 543 v_regs += 0x10;
rlm@0 544 v++;
rlm@0 545 }
rlm@0 546 while ( vbit < 0x100 );
rlm@0 547
rlm@0 548 // Echo position
rlm@0 549 int echo_offset = m.echo_offset;
rlm@0 550 uint8_t* const echo_ptr = &ram [(REG(esa) * 0x100 + echo_offset) & 0xFFFF];
rlm@0 551 if ( !echo_offset )
rlm@0 552 m.echo_length = (REG(edl) & 0x0F) * 0x800;
rlm@0 553 echo_offset += 4;
rlm@0 554 if ( echo_offset >= m.echo_length )
rlm@0 555 echo_offset = 0;
rlm@0 556 m.echo_offset = echo_offset;
rlm@0 557
rlm@0 558 // FIR
rlm@0 559 int echo_in_l = GET_LE16SA( echo_ptr + 0 );
rlm@0 560 int echo_in_r = GET_LE16SA( echo_ptr + 2 );
rlm@0 561
rlm@0 562 int (*echo_hist_pos) [2] = m.echo_hist_pos;
rlm@0 563 if ( ++echo_hist_pos >= &m.echo_hist [echo_hist_size] )
rlm@0 564 echo_hist_pos = m.echo_hist;
rlm@0 565 m.echo_hist_pos = echo_hist_pos;
rlm@0 566
rlm@0 567 echo_hist_pos [0] [0] = echo_hist_pos [8] [0] = echo_in_l;
rlm@0 568 echo_hist_pos [0] [1] = echo_hist_pos [8] [1] = echo_in_r;
rlm@0 569
rlm@0 570 #define CALC_FIR_( i, in ) ((in) * (int8_t) REG(fir + i * 0x10))
rlm@0 571 echo_in_l = CALC_FIR_( 7, echo_in_l );
rlm@0 572 echo_in_r = CALC_FIR_( 7, echo_in_r );
rlm@0 573
rlm@0 574 #define CALC_FIR( i, ch ) CALC_FIR_( i, echo_hist_pos [i + 1] [ch] )
rlm@0 575 #define DO_FIR( i )\
rlm@0 576 echo_in_l += CALC_FIR( i, 0 );\
rlm@0 577 echo_in_r += CALC_FIR( i, 1 );
rlm@0 578 DO_FIR( 0 );
rlm@0 579 DO_FIR( 1 );
rlm@0 580 DO_FIR( 2 );
rlm@0 581 #if defined (__MWERKS__) && __MWERKS__ < 0x3200
rlm@0 582 __eieio(); // keeps compiler from stupidly "caching" things in memory
rlm@0 583 #endif
rlm@0 584 DO_FIR( 3 );
rlm@0 585 DO_FIR( 4 );
rlm@0 586 DO_FIR( 5 );
rlm@0 587 DO_FIR( 6 );
rlm@0 588
rlm@0 589 // Echo out
rlm@0 590 if ( !(REG(flg) & 0x20) )
rlm@0 591 {
rlm@0 592 int l = (echo_out_l >> 7) + ((echo_in_l * (int8_t) REG(efb)) >> 14);
rlm@0 593 int r = (echo_out_r >> 7) + ((echo_in_r * (int8_t) REG(efb)) >> 14);
rlm@0 594
rlm@0 595 // just to help pass more validation tests
rlm@0 596 #if SPC_MORE_ACCURACY
rlm@0 597 l &= ~1;
rlm@0 598 r &= ~1;
rlm@0 599 #endif
rlm@0 600
rlm@0 601 CLAMP16( l );
rlm@0 602 CLAMP16( r );
rlm@0 603
rlm@0 604 SET_LE16A( echo_ptr + 0, l );
rlm@0 605 SET_LE16A( echo_ptr + 2, r );
rlm@0 606 }
rlm@0 607
rlm@0 608 // Sound out
rlm@0 609 int l = (main_out_l * mvoll + echo_in_l * (int8_t) REG(evoll)) >> 14;
rlm@0 610 int r = (main_out_r * mvolr + echo_in_r * (int8_t) REG(evolr)) >> 14;
rlm@0 611
rlm@0 612 CLAMP16( l );
rlm@0 613 CLAMP16( r );
rlm@0 614
rlm@0 615 if ( (REG(flg) & 0x40) )
rlm@0 616 {
rlm@0 617 l = 0;
rlm@0 618 r = 0;
rlm@0 619 }
rlm@0 620
rlm@0 621 sample_t* out = m.out;
rlm@0 622 WRITE_SAMPLES( l, r, out );
rlm@0 623 m.out = out;
rlm@0 624 }
rlm@0 625 while ( --count );
rlm@0 626 }
rlm@0 627
rlm@0 628
rlm@0 629 //// Setup
rlm@0 630
rlm@0 631 void SPC_DSP::mute_voices( int mask )
rlm@0 632 {
rlm@0 633 m.mute_mask = mask;
rlm@0 634 for ( int i = 0; i < voice_count; i++ )
rlm@0 635 {
rlm@0 636 m.voices [i].enabled = (mask >> i & 1) - 1;
rlm@0 637 update_voice_vol( i * 0x10 );
rlm@0 638 }
rlm@0 639 }
rlm@0 640
rlm@0 641 void SPC_DSP::init( void* ram_64k )
rlm@0 642 {
rlm@0 643 m.ram = (uint8_t*) ram_64k;
rlm@0 644 mute_voices( 0 );
rlm@0 645 disable_surround( false );
rlm@0 646 set_output( 0, 0 );
rlm@0 647 reset();
rlm@0 648
rlm@0 649 #ifndef NDEBUG
rlm@0 650 // be sure this sign-extends
rlm@0 651 assert( (int16_t) 0x8000 == -0x8000 );
rlm@0 652
rlm@0 653 // be sure right shift preserves sign
rlm@0 654 assert( (-1 >> 1) == -1 );
rlm@0 655
rlm@0 656 // check clamp macro
rlm@0 657 int i;
rlm@0 658 i = +0x8000; CLAMP16( i ); assert( i == +0x7FFF );
rlm@0 659 i = -0x8001; CLAMP16( i ); assert( i == -0x8000 );
rlm@0 660
rlm@0 661 blargg_verify_byte_order();
rlm@0 662 #endif
rlm@0 663 }
rlm@0 664
rlm@0 665 void SPC_DSP::soft_reset_common()
rlm@0 666 {
rlm@0 667 require( m.ram ); // init() must have been called already
rlm@0 668
rlm@0 669 m.noise = 0x4000;
rlm@0 670 m.echo_hist_pos = m.echo_hist;
rlm@0 671 m.every_other_sample = 1;
rlm@0 672 m.echo_offset = 0;
rlm@0 673 m.phase = 0;
rlm@0 674
rlm@0 675 init_counter();
rlm@0 676 }
rlm@0 677
rlm@0 678 void SPC_DSP::soft_reset()
rlm@0 679 {
rlm@0 680 REG(flg) = 0xE0;
rlm@0 681 soft_reset_common();
rlm@0 682 }
rlm@0 683
rlm@0 684 void SPC_DSP::load( uint8_t const regs [register_count] )
rlm@0 685 {
rlm@0 686 memcpy( m.regs, regs, sizeof m.regs );
rlm@0 687 memset( &m.regs [register_count], 0, offsetof (state_t,ram) - register_count );
rlm@0 688
rlm@0 689 // Internal state
rlm@0 690 int i;
rlm@0 691 for ( i = voice_count; --i >= 0; )
rlm@0 692 {
rlm@0 693 voice_t& v = m.voices [i];
rlm@0 694 v.brr_offset = 1;
rlm@0 695 v.buf_pos = v.buf;
rlm@0 696 }
rlm@0 697 m.new_kon = REG(kon);
rlm@0 698
rlm@0 699 mute_voices( m.mute_mask );
rlm@0 700 soft_reset_common();
rlm@0 701 }
rlm@0 702
rlm@0 703 void SPC_DSP::reset() { load( initial_regs ); }