1.1 --- a/modules/bluespec/Pygar/core/Core.bsv	Tue Apr 27 23:06:26 2010 -0400
     1.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.3 @@ -1,81 +0,0 @@
     1.4 -// The MIT License
     1.5 -
     1.6 -// Copyright (c) 2009 Massachusetts Institute of Technology
     1.7 -
     1.8 -// Permission is hereby granted, free of charge, to any person obtaining a copy
     1.9 -// of this software and associated documentation files (the "Software"), to deal
    1.10 -// in the Software without restriction, including without limitation the rights
    1.11 -// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    1.12 -// copies of the Software, and to permit persons to whom the Software is
    1.13 -// furnished to do so, subject to the following conditions:
    1.14 -
    1.15 -// The above copyright notice and this permission notice shall be included in
    1.16 -// all copies or substantial portions of the Software.
    1.17 -
    1.18 -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    1.19 -// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    1.20 -// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
    1.21 -// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    1.22 -// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    1.23 -// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    1.24 -// THE SOFTWARE.
    1.25 -
    1.26 -import Connectable::*;
    1.27 -import GetPut::*;
    1.28 -import ClientServer::*;
    1.29 -
    1.30 -import DataCacheBlocking::*;
    1.31 -import InstCacheBlocking::*;
    1.32 -import Processor::*;
    1.33 -import MemArb::*;
    1.34 -import MemTypes::*;
    1.35 -
    1.36 -interface CoreStats;
    1.37 -  interface DCacheStats dcache;
    1.38 -  interface ICacheStats icache;
    1.39 -  interface ProcStats proc;
    1.40 -endinterface
    1.41 -
    1.42 -interface Core;
    1.43 -
    1.44 -  // Interface from core to main memory
    1.45 -  interface Client#(MainMemReq,MainMemResp) mmem_client;
    1.46 -
    1.47 -  // Statistics
    1.48 -  interface CoreStats stats;
    1.49 -
    1.50 -  // CPU to Host
    1.51 -  interface CPUToHost tohost;
    1.52 -
    1.53 -endinterface
    1.54 -
    1.55 -(* synthesize *)
    1.56 -module mkCore(Core);
    1.57 -
    1.58 -  // Instantiate the modules
    1.59 -  Proc proc <- mkProc();
    1.60 -  ICache#(InstReq,InstResp) icache <- mkInstCache();
    1.61 -  DCache#(DataReq,DataResp) dcache <- mkDataCache();
    1.62 -  MemArb marb <- mkMemArb();
    1.63 -
    1.64 -  // Internal connections
    1.65 -  mkConnection( proc.statsEn_get,   icache.statsEn_put );
    1.66 -  mkConnection( proc.statsEn_get,   dcache.statsEn_put );
    1.67 -  mkConnection( proc.imem_client,   icache.proc_server );
    1.68 -  mkConnection( proc.dmem_client,   dcache.proc_server );
    1.69 -  mkConnection( icache.mmem_client, marb.cache0_server );
    1.70 -  mkConnection( dcache.mmem_client, marb.cache1_server );
    1.71 -
    1.72 -  // Methods
    1.73 -  interface mmem_client = marb.mmem_client;
    1.74 -
    1.75 -  interface CoreStats stats;
    1.76 -    interface dcache = dcache.stats;
    1.77 -    interface icache = icache.stats;
    1.78 -    interface proc = proc.stats;
    1.79 -  endinterface
    1.80 -
    1.81 -  interface CPUToHost tohost = proc.tohost;
    1.82 -
    1.83 -endmodule
    1.84 -

     2.1 --- a/modules/bluespec/Pygar/core/Core.bsv~	Tue Apr 27 23:06:26 2010 -0400
     2.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.3 @@ -1,81 +0,0 @@
     2.4 -// The MIT License
     2.5 -
     2.6 -// Copyright (c) 2009 Massachusetts Institute of Technology
     2.7 -
     2.8 -// Permission is hereby granted, free of charge, to any person obtaining a copy
     2.9 -// of this software and associated documentation files (the "Software"), to deal
    2.10 -// in the Software without restriction, including without limitation the rights
    2.11 -// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    2.12 -// copies of the Software, and to permit persons to whom the Software is
    2.13 -// furnished to do so, subject to the following conditions:
    2.14 -
    2.15 -// The above copyright notice and this permission notice shall be included in
    2.16 -// all copies or substantial portions of the Software.
    2.17 -
    2.18 -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    2.19 -// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    2.20 -// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
    2.21 -// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    2.22 -// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    2.23 -// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    2.24 -// THE SOFTWARE.
    2.25 -
    2.26 -import Connectable::*;
    2.27 -import GetPut::*;
    2.28 -import ClientServer::*;
    2.29 -
    2.30 -import DataCacheBlocking::*;
    2.31 -import InstCacheBlocking::*;
    2.32 -import Processor::*;
    2.33 -import MemArb::*;
    2.34 -import MemTypes::*;
    2.35 -
    2.36 -interface CoreStats;
    2.37 -  interface DCacheStats dcache;
    2.38 -  interface ICacheStats icache;
    2.39 -  interface ProcStats proc;
    2.40 -endinterface
    2.41 -
    2.42 -interface Core;
    2.43 -
    2.44 -  // Interface from core to main memory
    2.45 -  interface Client#(MainMemReq,MainMemResp) mmem_client;
    2.46 -
    2.47 -  // Statistics
    2.48 -  interface CoreStats stats;
    2.49 -
    2.50 -  // CPU to Host
    2.51 -  interface CPUToHost tohost;
    2.52 -
    2.53 -endinterface
    2.54 -
    2.55 -(* synthesize *)
    2.56 -module mkCore(Core);
    2.57 -
    2.58 -  // Instantiate the modules
    2.59 -  Proc proc <- mkProc();
    2.60 -  ICache#(InstReq,InstResp) icache <- mkInstCache();
    2.61 -  DCache#(DataReq,DataResp) dcache <- mkDataCache();
    2.62 -  MemArb marb <- mkMemArb();
    2.63 -
    2.64 -  // Internal connections
    2.65 -  mkConnection( proc.statsEn_get,   icache.statsEn_put );
    2.66 -  mkConnection( proc.statsEn_get,   dcache.statsEn_put );
    2.67 -  mkConnection( proc.imem_client,   icache.proc_server );
    2.68 -  mkConnection( proc.dmem_client,   dcache.proc_server );
    2.69 -  mkConnection( icache.mmem_client, marb.cache0_server );
    2.70 -  mkConnection( dcache.mmem_client, marb.cache1_server );
    2.71 -
    2.72 -  // Methods
    2.73 -  interface mmem_client = marb.mmem_client;
    2.74 -
    2.75 -  interface CoreStats stats;
    2.76 -    interface dcache = dcache.stats;
    2.77 -    interface icache = icache.stats;
    2.78 -    interface proc = proc.stats;
    2.79 -  endinterface
    2.80 -
    2.81 -  interface CPUToHost tohost = proc.tohost;
    2.82 -
    2.83 -endmodule
    2.84 -

     3.1 --- a/modules/bluespec/Pygar/core/Processor.bsv	Tue Apr 27 23:06:26 2010 -0400
     3.2 +++ b/modules/bluespec/Pygar/core/Processor.bsv	Tue Apr 27 23:31:38 2010 -0400
     3.3 @@ -20,6 +20,8 @@
     3.4  // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     3.5  // THE SOFTWARE.
     3.6  
     3.7 +
     3.8 +
     3.9  import Connectable::*;
    3.10  import GetPut::*;
    3.11  import ClientServer::*;
    3.12 @@ -618,9 +620,9 @@
    3.13  //    endmethod
    3.14  //  endinterface
    3.15       
    3.16 -  interface Get sampleOutput;
    3.17 -     interface sampleOutput = fifoToGet(outAudioFifo);
    3.18 -  endinterface
    3.19 +
    3.20 +     interface Get sampleOutput = fifoToGet(outAudioFifo);
    3.21 +
    3.22  
    3.23  
    3.24  endmodule

     4.1 --- a/modules/bluespec/Pygar/core/audioCore.bsv	Tue Apr 27 23:06:26 2010 -0400
     4.2 +++ b/modules/bluespec/Pygar/core/audioCore.bsv	Tue Apr 27 23:31:38 2010 -0400
     4.3 @@ -41,7 +41,8 @@
     4.4  `include "asim/provides/audio_pipe_types.bsh"
     4.5  
     4.6  
     4.7 -interface Core;
     4.8 +
     4.9 +interface AudioCore;
    4.10  
    4.11    // Interface from core to main memory
    4.12     interface Client#(MainMemReq,MainMemResp) mmem_client;
    4.13 @@ -50,7 +51,7 @@
    4.14        
    4.15  endinterface
    4.16  
    4.17 -module   [CONNECTED_MODULE]  mkCore( Core );
    4.18 +module   [CONNECTED_MODULE]  mkCore( AudioCore );
    4.19  
    4.20    // Instantiate the modules
    4.21