# HG changeset patch # User punk # Date 1273013694 14400 # Node ID 99519a031813643d8190671691cb8fea2353fb50 # Parent 14f7a7ace3f5437887b713b29816e8b085647af0 [svn r37] moved the server into audioCorePipeline diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/core/#Processor.bsv# --- a/modules/bluespec/Pygar/core/#Processor.bsv# Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/core/#Processor.bsv# Tue May 04 18:54:54 2010 -0400 @@ -30,8 +30,10 @@ import FIFOF::*; import SFIFO::*; import RWire::*; + import Trace::*; import BFIFO::*; +import MemTypes::*; import ProcTypes::*; import BRegFile::*; import BranchPred::*; @@ -44,7 +46,7 @@ // Local includes //`include "asim/provides/processor_library.bsh" (included above directly) -`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh" + `include "asim/provides/common_services.bsh" `include "asim/dict/STATS_PROCESSOR.bsh" `include "asim/provides/processor_library.bsh" @@ -75,6 +77,7 @@ // Interface to Audio Pipeline interface Get#(AudioProcessorUnit) sampleOutput; + interface Put#(AudioProcessorUnit) sampleInput; endinterface @@ -225,12 +228,6 @@ module [CONNECTED_MODULE] mkProc( Proc ); //----------------------------------------------------------- - // Debug port - - ServerStub_AUDIOCORERRR server_stub <- mkServerStub_AUDIOCORERRR(); - - - //----------------------------------------------------------- // State // Standard processor state @@ -248,10 +245,13 @@ FIFO#(PCStat) pcQ <-mkSizedFIFO(3); SFIFO#(WBResult, Rindx) wbQ <-mkSFIFO(findwbf); + // NEED TO ADD CAPABILITY FOR RESET (should be able to just say if I get valid in and these are flagged, clear them. Reg#(Bit#(32)) cp0_tohost <- mkReg(0); Reg#(Bit#(32)) cp0_fromhost <- mkReg(0); Reg#(Bool) cp0_statsEn <- mkReg(False); - + Reg#(Bool) cp0_audioEOF <- mkReg(False); // Register to let code that EOF is reached + Reg#(Bool) cp0_progComp <- mkReg(False); // Register to let processor know that the program is complete (as this terminates) + // Memory request/response state FIFO#(InstReq) instReqQ <- mkBFIFO1(); @@ -266,8 +266,8 @@ // Statistics state (2010) -// Reg#(Stat) num_cycles <- mkReg(0); -// Reg#(Stat) num_inst <- mkReg(0); + // Reg#(Stat) num_cycles <- mkReg(0); + // Reg#(Stat) num_inst <- mkReg(0); //Or: // Statistics state @@ -486,11 +486,14 @@ // -- Cop0 ------------------------------------------------------ - tagged MTC0 .it : + tagged MTC0 .it : //Recieve things from host computer begin + $display( " PROCESSOR MTC0 call\n"); case ( it.cop0dst ) 5'd10 : cp0_statsEn <= unpack(truncate(rf.rd1(it.rsrc))); 5'd21 : cp0_tohost <= truncate(rf.rd1(it.rsrc)); + 5'd26 : cp0_progComp <= unpack(truncate(rf.rd1(it.rsrc))); //states audio program completed and termination okay + 5'd27 : outAudioFifo.enq(tagged Sample unpack(truncate(rf.rd1(it.rsrc)))); //Bit size is 16 not 32 default : $display( " RTL-ERROR : %m : Illegal MTC0 cop0dst register!" ); endcase @@ -498,13 +501,27 @@ end //this is host stuff? - tagged MFC0 .it : + tagged MFC0 .it : //Things out begin + $display( " PROCESSOR MFC0 call\n"); case ( it.cop0src ) // not actually an ALU instruction but don't have the format otherwise 5'd10 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_statsEn)) }); 5'd20 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_fromhost }); 5'd21 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_tohost }); + 5'd25 : begin + $display( "**** EOF Requested\n "); + wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_audioEOF)) }); // Reading clears bit + cp0_audioEOF <= False; + end + 5'd28 : begin + $display( "***** Reqesting Sample \n"); + let sample = inAudioFifo.first(); // is this going to cause perf. delay? + if (sample matches tagged Sample .audio) // if it is EOF another rule sets the cp0_audioEOF + wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) }); // do I need pack? + else $display ( "Audio File EOF Reached. Invalid sample request."); + inAudioFifo.deq(); + end default : $display( " RTL-ERROR : %m : Illegal MFC0 cop0src register!" ); endcase @@ -559,41 +576,27 @@ num_cycles.incr(); endrule -(* conservative_implicit_conditions *) - rule handleCPUToHost; - let req <- server_stub.acceptRequest_ReadCPUToHost(); - case (req) - 0: server_stub.sendResponse_ReadCPUToHost(cp0_tohost); - 1: server_stub.sendResponse_ReadCPUToHost(pc); - 2: server_stub.sendResponse_ReadCPUToHost(zeroExtend(pack(stage))); - endcase + + // for now, we don't do anything. +// rule connectAudioReqResp; +// $display("rlm: PROCESSOR copies a datum\n"); +// outAudioFifo.enq(inAudioFifo.first()); +// inAudioFifo.deq; +// endrule + + rule flagAudioEnd (inAudioFifo.first() matches tagged EndOfFile); + $display (" Proc Says End Audio Flag Set "); + cp0_audioEOF <= True; + inAudioFifo.deq; endrule - // for now, we don't do anything. - rule connectAudioReqResp; -// $display("rlm: PROCESSOR copies a datum\n"); - outAudioFifo.enq(inAudioFifo.first()); - inAudioFifo.deq; + rule sendAudioEnd (cp0_progComp); + $display (" PROCESSOR Says Program Complete "); + outAudioFifo.enq(tagged EndOfFile); + cp0_progComp <= False; //only send one. And functions to reset endrule - // Server items & rules: - rule feedInput; - let command <- server_stub.acceptRequest_SendUnprocessedStream(); - AudioProcessorControl ctrl = unpack(truncate(command.ctrl)); - if(ctrl == EndOfFile) - begin -// $display("lsp: PROCESSOR received EOF "); - inAudioFifo.enq(tagged EndOfFile); - end - else - begin -// $display("lsp: PROCESSOR received Data "); - inAudioFifo.enq(tagged Sample unpack(truncate(command.sample))); - end - endrule - - //----------------------------------------------------------- // Methods @@ -609,17 +612,20 @@ interface Get statsEn_get = toGet(asReg(cp0_statsEn)); -// interface CPUToHost tohost; -// method Bit#(32) cpuToHost(int req); -// return (case (req) -// 0: cp0_tohost; -// 1: pc; -// 2: zeroExtend(pack(stage)); -// endcase); -// endmethod -// endinterface - + /* + interface CPUToHost tohost; + method Bit#(32) cpuToHost(int req); + return (case (req) + 0: cp0_tohost; + 1: pc; + 2: zeroExtend(pack(stage)); + endcase); + endmethod + endinterface + */ + interface Get sampleOutput = fifoToGet(outAudioFifo); + interface Put sampleInput = fifoToPut(inAudioFifo); endmodule diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/core/AudioCoreRRR.rrr --- a/modules/bluespec/Pygar/core/AudioCoreRRR.rrr Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/core/AudioCoreRRR.rrr Tue May 04 18:54:54 2010 -0400 @@ -3,9 +3,9 @@ server hw (bsv, connection) <- sw (cpp, method) { method ReadCPUToHost (out UINT32[32] regValue, in UINT32[32] dummy); - //method SendUnprocessedStream (in UINT32[32] ctrl, in UINT32[32] sample); + method SendUnprocessedStream (in UINT32[32] ctrl, in UINT32[32] sample); //rlm: here it is modified to take N - method SendUnprocessedStream (in UINT32[32] channel, in UINT32[32] ctrl, in UINT32[32] sample); +// method SendUnprocessedStream (in UINT32[32] channel, in UINT32[32] ctrl, in UINT32[32] sample); }; diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/core/AudioCoreSystem.cpp --- a/modules/bluespec/Pygar/core/AudioCoreSystem.cpp Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/core/AudioCoreSystem.cpp Tue May 04 18:54:54 2010 -0400 @@ -64,13 +64,13 @@ { //rlm: two files FILE *inputFile; - FILE *inputFile1; + // FILE *inputFile1; UINT16 sample; - UINT16 sample1; + //UINT16 sample1; //rlm: not sure if normal ints are ok here; using UINT16 because I know it works UINT16 channel0 = 0; - UINT16 channel1 = 1; + //UINT16 channel1 = 1; //init processor int sleepCount = 0; @@ -78,8 +78,6 @@ bool coreFin = false; - - fflush(stdout); // Convert input wav to pcm @@ -88,16 +86,15 @@ //rlm: for now we are going to going to just have 2 files with "common names" generate_pcm("input.wav","input.pcm"); - generate_pcm("input1.wav", "input1.pcm"); - + //generate_pcm("input1.wav", "input1.pcm"); //Send data to the machine here. //rlm: two files inputFile = fopen("input.pcm","r"); - inputFile = fopen("input1.pcm", "r"); + // inputFile = fopen("input1.pcm", "r"); - assert(inputFile1); + //assert(inputFile1); assert(inputFile); int count = 0; @@ -106,7 +103,8 @@ //rlm: here we read both files. later refactor into a function. // also, this will terminate when the FIRST file reaches its end. - while( (fread(&sample, 2, 1, inputFile)) && (fread(&sample1, 2 , 1, inputFile1))) { + while( (fread(&sample, 2, 1, inputFile)) )//&& (fread(&sample1, 2 , 1, inputFile1))) + { if (!coreFin && (result = clientStub->ReadCPUToHost(0)) != 1) { sleepCount++; @@ -131,8 +129,9 @@ sem_wait(&throttle); //rlm: two files. - clientStub->SendUnprocessedStream(channel0 , Data,(UINT32)sample); - clientStub->SendUnprocessedStream(channel1 , Data,(UINT32)sample1); + clientStub->SendUnprocessedStream( Data,(UINT32)sample); + //clientStub->SendUnprocessedStream(channel0 , Data,(UINT32)sample); + //clientStub->SendUnprocessedStream(channel1 , Data,(UINT32)sample1); } @@ -143,8 +142,9 @@ //rlm: have to send end-files to both voices. // all of these operations wil eventually be moved into functions. - clientStub->SendUnprocessedStream(channel0, EndOfFile,0); - clientStub->SendUnprocessedStream(channel1, EndOfFile,0); + clientStub->SendUnprocessedStream(EndOfFile,0); + //clientStub->SendUnprocessedStream(channel0, EndOfFile,0); + // clientStub->SendUnprocessedStream(channel1, EndOfFile,0); printf("main: wait for end of file\n"); diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/core/Processor.bsv --- a/modules/bluespec/Pygar/core/Processor.bsv Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/core/Processor.bsv Tue May 04 18:54:54 2010 -0400 @@ -46,7 +46,7 @@ // Local includes //`include "asim/provides/processor_library.bsh" (included above directly) -`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh" + `include "asim/provides/common_services.bsh" `include "asim/dict/STATS_PROCESSOR.bsh" `include "asim/provides/processor_library.bsh" @@ -77,6 +77,7 @@ // Interface to Audio Pipeline interface Get#(AudioProcessorUnit) sampleOutput; + interface Put#(AudioProcessorUnit) sampleInput; endinterface @@ -227,12 +228,6 @@ module [CONNECTED_MODULE] mkProc( Proc ); //----------------------------------------------------------- - // Debug port - - ServerStub_AUDIOCORERRR server_stub <- mkServerStub_AUDIOCORERRR(); - - - //----------------------------------------------------------- // State // Standard processor state @@ -581,15 +576,6 @@ num_cycles.incr(); endrule -(* conservative_implicit_conditions *) - rule handleCPUToHost; - let req <- server_stub.acceptRequest_ReadCPUToHost(); - case (req) - 0: server_stub.sendResponse_ReadCPUToHost(cp0_tohost); - 1: server_stub.sendResponse_ReadCPUToHost(pc); - 2: server_stub.sendResponse_ReadCPUToHost(zeroExtend(pack(stage))); - endcase - endrule // for now, we don't do anything. // rule connectAudioReqResp; @@ -610,24 +596,7 @@ cp0_progComp <= False; //only send one. And functions to reset endrule - // Server items & rules: - rule feedInput; - let command <- server_stub.acceptRequest_SendUnprocessedStream(); - AudioProcessorControl ctrl = unpack(truncate(command.ctrl)); - if(ctrl == EndOfFile) - begin - $display("lsp: PROCESSOR received EOF "); - inAudioFifo.enq(tagged EndOfFile); - end - else - begin - $display("lsp: PROCESSOR received Data "); - inAudioFifo.enq(tagged Sample unpack(truncate(command.sample))); - end - endrule - - //----------------------------------------------------------- // Methods @@ -643,17 +612,20 @@ interface Get statsEn_get = toGet(asReg(cp0_statsEn)); -// interface CPUToHost tohost; -// method Bit#(32) cpuToHost(int req); -// return (case (req) -// 0: cp0_tohost; -// 1: pc; -// 2: zeroExtend(pack(stage)); -// endcase); -// endmethod -// endinterface - + /* + interface CPUToHost tohost; + method Bit#(32) cpuToHost(int req); + return (case (req) + 0: cp0_tohost; + 1: pc; + 2: zeroExtend(pack(stage)); + endcase); + endmethod + endinterface + */ + interface Get sampleOutput = fifoToGet(outAudioFifo); + interface Put sampleInput = fifoToPut(inAudioFifo); endmodule diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/core/audioCore.bsv --- a/modules/bluespec/Pygar/core/audioCore.bsv Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/core/audioCore.bsv Tue May 04 18:54:54 2010 -0400 @@ -46,7 +46,10 @@ interface Client#(MainMemReq,MainMemResp) mmem_client; interface Get#(AudioProcessorUnit) sampleOutput; - + interface Put#(AudioProcessorUnit) sampleInput; + +// interface CPUToHost tohost; + endinterface module [CONNECTED_MODULE] mkCore( Core ); @@ -72,5 +75,8 @@ interface mmem_client = marb.mmem_client; interface sampleOutput = proc.sampleOutput; + interface sampleInput = proc.sampleInput; + +// interface CPUToHost tohost = proc.tohost; endmodule diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/core/audioCorePipeline.bsv --- a/modules/bluespec/Pygar/core/audioCorePipeline.bsv Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/core/audioCorePipeline.bsv Tue May 04 18:54:54 2010 -0400 @@ -44,7 +44,7 @@ `include "asim/dict/VDEV_SCRATCH.bsh" `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh" -//`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh" +`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh" module [CONNECTED_MODULE] mkConnectedApplication (); Core core <- mkCore; @@ -60,6 +60,12 @@ // Make this big enough so that several outstanding requests may be supported FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8); + //----------------------------------------------------------- + // Debug port + + ServerStub_AUDIOCORERRR server_stub <- mkServerStub_AUDIOCORERRR(); + + // this is for the tracing rule printCycles; cycle <= cycle+1; @@ -99,4 +105,20 @@ endcase endrule + //***** SERVER Side ***** + + rule feedInput; + let command <- server_stub.acceptRequest_SendUnprocessedStream(); + AudioProcessorControl ctrl = unpack(truncate(command.ctrl)); + if(ctrl == EndOfFile) + begin + $display("lsp: PROCESSOR received EOF "); + core.sampleInput.put(tagged EndOfFile); + end + else + begin + $display("lsp: PROCESSOR received Data "); + core.sampleInput.put(tagged Sample unpack(truncate(command.sample))); + end + endrule endmodule diff -r 14f7a7ace3f5 -r 99519a031813 modules/bluespec/Pygar/lab4/processor_library.awb --- a/modules/bluespec/Pygar/lab4/processor_library.awb Tue May 04 12:14:24 2010 -0400 +++ b/modules/bluespec/Pygar/lab4/processor_library.awb Tue May 04 18:54:54 2010 -0400 @@ -5,4 +5,4 @@ %attributes PYGAR -%public Trace.bsv BFIFO.bsv MemTypes.bsv FIFOUtility.bsv GetPutExt.bsv SFIFO.bsv CBUFF.bsv BRegFile.bsv BranchPred.bsv +%public Trace.bsv BFIFO.bsv MemTypes.bsv FIFOUtility.bsv GetPutExt.bsv SFIFO.bsv CBUFF.bsv BRegFile.bsv BranchPred.bsv Divider.bsv