# HG changeset patch # User punk # Date 1272633280 14400 # Node ID 2adf0fb45061877e7e6b7710826c9be22393d808 # Parent 9830ff8fb0bd9e4dccc4e3fe9bae2239efe1204b [svn r31] Finishing diff -r 9830ff8fb0bd -r 2adf0fb45061 config/pm/Pygar/audio_core/audio_core_exe.apm --- a/config/pm/Pygar/audio_core/audio_core_exe.apm Fri Apr 30 09:13:38 2010 -0400 +++ b/config/pm/Pygar/audio_core/audio_core_exe.apm Fri Apr 30 09:14:40 2010 -0400 @@ -61,50 +61,51 @@ [3-Stage Audio Processor] File=modules/bluespec/Pygar/core/processor.awb -Packagehint=Pygar [Blocking Data Cache] File=modules/bluespec/Pygar/lab4/data_cache.awb -Packagehint=Pygar [Blocking Instruction Cache] File=modules/bluespec/Pygar/lab4/instruction_cache.awb -Packagehint=Pygar [Default HAsim Common Library] File=config/pm/hasim/submodels/common/hasim_common.apm Packagehint=hasim -[Simple Audio Processor Core] -File=modules/bluespec/Pygar/core/audio_pipe_types.awb -Packagehint=Pygar - [Round-robin memory arbiter] File=modules/bluespec/Pygar/lab4/mem_arb.awb -Packagehint=Pygar - -[Processor Library] -File=modules/bluespec/Pygar/lab4/processor_library.awb -Packagehint=Pygar [audio pipeline with soft core] File=modules/bluespec/Pygar/core/audio_core_pipe.awb -Packagehint=Pygar [Audio Processor Core] File=modules/bluespec/Pygar/core/audio_core.awb -Packagehint=Pygar [audio pipeline with soft core/Requires] hasim_common=Default HAsim Common Library funcp_simulated_memory=VMH hybrid memory core=Audio Processor Core funcp_base_types=Functional Partition Base Types -audio_pipe_types=Simple Audio Processor Core +audio_pipe_types=Simple Audio Processor Control Types [Audio Processor Core/Requires] -processor_library=Processor Library +processor_library=External Trace Processor Library processor=3-Stage Audio Processor data_cache=Blocking Data Cache instruction_cache=Blocking Instruction Cache mem_arb=Round-robin memory arbiter + + + +[Simple Audio Processor Control Types] +File=modules/bluespec/Pygar/core/audio_pipe_types.awb + + +[Trace Functions] +File=modules/bluespec/Pygar/core/trace.awb + +[External Trace Processor Library/Requires] +trace=Trace Functions + +[External Trace Processor Library] +File=modules/bluespec/Pygar/lab4/audio_processor_library.awb diff -r 9830ff8fb0bd -r 2adf0fb45061 modules/bluespec/Pygar/lab4/ProcTrace.bsv --- a/modules/bluespec/Pygar/lab4/ProcTrace.bsv Fri Apr 30 09:13:38 2010 -0400 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,109 +0,0 @@ - -import Trace::*; - -//---------------------------------------------------------------------- -// Trace -//---------------------------------------------------------------------- - -instance Traceable#(Instr); - - function Action traceTiny( String loc, String ttag, Instr inst ); - case ( inst ) matches - - tagged LW .it : $fdisplay(stderr, " => %s:%s lw", loc, ttag ); - tagged SW .it : $fdisplay(stderr, " => %s:%s sw", loc, ttag ); - - tagged ADDIU .it : $fdisplay(stderr, " => %s:%s addi", loc, ttag ); - tagged SLTI .it : $fdisplay(stderr, " => %s:%s sli", loc, ttag ); - tagged SLTIU .it : $fdisplay(stderr, " => %s:%s sliu", loc, ttag ); - tagged ANDI .it : $fdisplay(stderr, " => %s:%s andi", loc, ttag ); - tagged ORI .it : $fdisplay(stderr, " => %s:%s ori", loc, ttag ); - tagged XORI .it : $fdisplay(stderr, " => %s:%s xori", loc, ttag ); - tagged LUI .it : $fdisplay(stderr, " => %s:%s lui", loc, ttag ); - - tagged SLL .it : $fdisplay(stderr, " => %s:%s sll", loc, ttag ); - tagged SRL .it : $fdisplay(stderr, " => %s:%s srl", loc, ttag ); - tagged SRA .it : $fdisplay(stderr, " => %s:%s sra", loc, ttag ); - tagged SLLV .it : $fdisplay(stderr, " => %s:%s sllv", loc, ttag ); - tagged SRLV .it : $fdisplay(stderr, " => %s:%s srlv", loc, ttag ); - tagged SRAV .it : $fdisplay(stderr, " => %s:%s srav", loc, ttag ); - - tagged ADDU .it : $fdisplay(stderr, " => %s:%s addu", loc, ttag ); - tagged SUBU .it : $fdisplay(stderr, " => %s:%s subu", loc, ttag ); - tagged AND .it : $fdisplay(stderr, " => %s:%s and", loc, ttag ); - tagged OR .it : $fdisplay(stderr, " => %s:%s or", loc, ttag ); - tagged XOR .it : $fdisplay(stderr, " => %s:%s xor", loc, ttag ); - tagged NOR .it : $fdisplay(stderr, " => %s:%s nor", loc, ttag ); - tagged SLT .it : $fdisplay(stderr, " => %s:%s slt", loc, ttag ); - tagged SLTU .it : $fdisplay(stderr, " => %s:%s sltu", loc, ttag ); - - tagged J .it : $fdisplay(stderr, " => %s:%s j", loc, ttag ); - tagged JAL .it : $fdisplay(stderr, " => %s:%s jal", loc, ttag ); - tagged JR .it : $fdisplay(stderr, " => %s:%s jr", loc, ttag ); - tagged JALR .it : $fdisplay(stderr, " => %s:%s jalr", loc, ttag ); - tagged BEQ .it : $fdisplay(stderr, " => %s:%s beq", loc, ttag ); - tagged BNE .it : $fdisplay(stderr, " => %s:%s bne", loc, ttag ); - tagged BLEZ .it : $fdisplay(stderr, " => %s:%s blez", loc, ttag ); - tagged BGTZ .it : $fdisplay(stderr, " => %s:%s bgtz", loc, ttag ); - tagged BLTZ .it : $fdisplay(stderr, " => %s:%s bltz", loc, ttag ); - tagged BGEZ .it : $fdisplay(stderr, " => %s:%s bgez", loc, ttag ); - - tagged MFC0 .it : $fdisplay(stderr, " => %s:%s mfc0", loc, ttag ); - tagged MTC0 .it : $fdisplay(stderr, " => %s:%s mtc0", loc, ttag ); - - tagged ILLEGAL : $fdisplay(stderr, " => %s:%s ill", loc, ttag ); - - endcase - endfunction - - function Action traceFull( String loc, String ttag, Instr inst ); - case ( inst ) matches - - tagged LW .it : $fdisplay(stderr, " => %s:%s lw r%0d, 0x%x(r%0d)", loc, ttag, it.rdst, it.offset, it.rbase ); - tagged SW .it : $fdisplay(stderr, " => %s:%s sw r%0d, 0x%x(r%0d)", loc, ttag, it.rsrc, it.offset, it.rbase ); - - tagged ADDIU .it : $fdisplay(stderr, " => %s:%s addiu r%0d, r%0d, 0x%x", loc, ttag, it.rdst, it.rsrc, it.imm ); - tagged SLTI .it : $fdisplay(stderr, " => %s:%s slti r%0d, r%0d, 0x%x", loc, ttag, it.rdst, it.rsrc, it.imm ); - tagged SLTIU .it : $fdisplay(stderr, " => %s:%s sltiu r%0d, r%0d, 0x%x", loc, ttag, it.rdst, it.rsrc, it.imm ); - tagged ANDI .it : $fdisplay(stderr, " => %s:%s andi r%0d, r%0d, 0x%x", loc, ttag, it.rdst, it.rsrc, it.imm ); - tagged ORI .it : $fdisplay(stderr, " => %s:%s ori r%0d, r%0d, 0x%x", loc, ttag, it.rdst, it.rsrc, it.imm ); - tagged XORI .it : $fdisplay(stderr, " => %s:%s xori r%0d, r%0d, 0x%x", loc, ttag, it.rdst, it.rsrc, it.imm ); - tagged LUI .it : $fdisplay(stderr, " => %s:%s lui r%0d, 0x%x", loc, ttag, it.rdst, it.imm ); - - tagged SLL .it : $fdisplay(stderr, " => %s:%s sll r%0d, r%0d, %0d", loc, ttag, it.rdst, it.rsrc, it.shamt ); - tagged SRL .it : $fdisplay(stderr, " => %s:%s srl r%0d, r%0d, %0d", loc, ttag, it.rdst, it.rsrc, it.shamt ); - tagged SRA .it : $fdisplay(stderr, " => %s:%s sra r%0d, r%0d, %0d", loc, ttag, it.rdst, it.rsrc, it.shamt ); - tagged SLLV .it : $fdisplay(stderr, " => %s:%s sllv r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc, it.rshamt ); - tagged SRLV .it : $fdisplay(stderr, " => %s:%s srlv r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc, it.rshamt ); - tagged SRAV .it : $fdisplay(stderr, " => %s:%s srav r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc, it.rshamt ); - - tagged ADDU .it : $fdisplay(stderr, " => %s:%s addu r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged SUBU .it : $fdisplay(stderr, " => %s:%s subu r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged AND .it : $fdisplay(stderr, " => %s:%s and r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged OR .it : $fdisplay(stderr, " => %s:%s or r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged XOR .it : $fdisplay(stderr, " => %s:%s xor r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged NOR .it : $fdisplay(stderr, " => %s:%s nor r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged SLT .it : $fdisplay(stderr, " => %s:%s slt r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - tagged SLTU .it : $fdisplay(stderr, " => %s:%s sltu r%0d, r%0d, r%0d", loc, ttag, it.rdst, it.rsrc1, it.rsrc2 ); - - tagged J .it : $fdisplay(stderr, " => %s:%s j 0x%x", loc, ttag, it.target ); - tagged JAL .it : $fdisplay(stderr, " => %s:%s jal 0x%x", loc, ttag, it.target ); - tagged JR .it : $fdisplay(stderr, " => %s:%s jr r%0d", loc, ttag, it.rsrc ); - tagged JALR .it : $fdisplay(stderr, " => %s:%s jalr r%0d", loc, ttag, it.rsrc ); - tagged BEQ .it : $fdisplay(stderr, " => %s:%s beq r%0d, r%0d, 0x%x", loc, ttag, it.rsrc1, it.rsrc2, it.offset ); - tagged BNE .it : $fdisplay(stderr, " => %s:%s bne r%0d, r%0d, 0x%x", loc, ttag, it.rsrc1, it.rsrc2, it.offset ); - tagged BLEZ .it : $fdisplay(stderr, " => %s:%s blez r%0d, 0x%x", loc, ttag, it.rsrc, it.offset ); - tagged BGTZ .it : $fdisplay(stderr, " => %s:%s bgtz r%0d, 0x%x", loc, ttag, it.rsrc, it.offset ); - tagged BLTZ .it : $fdisplay(stderr, " => %s:%s bltz r%0d, 0x%x", loc, ttag, it.rsrc, it.offset ); - tagged BGEZ .it : $fdisplay(stderr, " => %s:%s bgez r%0d, 0x%x", loc, ttag, it.rsrc, it.offset ); - - tagged MFC0 .it : $fdisplay(stderr, " => %s:%s mfc0 r%0d, cpr%0d", loc, ttag, it.rdst, it.cop0src ); - tagged MTC0 .it : $fdisplay(stderr, " => %s:%s mtc0 r%0d, cpr%0d", loc, ttag, it.rsrc, it.cop0dst ); - - tagged ILLEGAL : $fdisplay(stderr, " => %s:%s illegal instruction", loc, ttag ); - - endcase - endfunction - -endinstance -