punk@13: // The MIT License
punk@13: 
punk@13: // Copyright (c) 2009 Massachusetts Institute of Technology
punk@13: 
punk@13: // Permission is hereby granted, free of charge, to any person obtaining a copy
punk@13: // of this software and associated documentation files (the "Software"), to deal
punk@13: // in the Software without restriction, including without limitation the rights
punk@13: // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
punk@13: // copies of the Software, and to permit persons to whom the Software is
punk@13: // furnished to do so, subject to the following conditions:
punk@13: 
punk@13: // The above copyright notice and this permission notice shall be included in
punk@13: // all copies or substantial portions of the Software.
punk@13: 
punk@13: // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
punk@13: // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
punk@13: // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
punk@13: // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
punk@13: // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
punk@13: // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
punk@13: // THE SOFTWARE.
punk@13: 
punk@13: import Connectable::*;
punk@13: import GetPut::*;
punk@13: import ClientServer::*;
punk@13: 
punk@13: import DataCacheBlocking::*;
punk@13: import InstCacheBlocking::*;
punk@13: import Processor::*;
punk@13: import MemArb::*;
punk@13: import MemTypes::*;
punk@13: 
punk@13: interface CoreStats;
punk@13:   interface DCacheStats dcache;
punk@13:   interface ICacheStats icache;
punk@13:   interface ProcStats proc;
punk@13: endinterface
punk@13: 
punk@13: interface Core;
punk@13: 
punk@13:   // Interface from core to main memory
punk@13:   interface Client#(MainMemReq,MainMemResp) mmem_client;
punk@13: 
punk@13:   // Statistics
punk@13:   interface CoreStats stats;
punk@13: 
punk@13:   // CPU to Host
punk@13:   interface CPUToHost tohost;
punk@13: 
punk@13: endinterface
punk@13: 
punk@13: (* synthesize *)
punk@13: module mkCore(Core);
punk@13: 
punk@13:   // Instantiate the modules
punk@13:   Proc proc <- mkProc();
punk@13:   ICache#(InstReq,InstResp) icache <- mkInstCache();
punk@13:   DCache#(DataReq,DataResp) dcache <- mkDataCache();
punk@13:   MemArb marb <- mkMemArb();
punk@13: 
punk@13:   // Internal connections
punk@13:   mkConnection( proc.statsEn_get,   icache.statsEn_put );
punk@13:   mkConnection( proc.statsEn_get,   dcache.statsEn_put );
punk@13:   mkConnection( proc.imem_client,   icache.proc_server );
punk@13:   mkConnection( proc.dmem_client,   dcache.proc_server );
punk@13:   mkConnection( icache.mmem_client, marb.cache0_server );
punk@13:   mkConnection( dcache.mmem_client, marb.cache1_server );
punk@13: 
punk@13:   // Methods
punk@13:   interface mmem_client = marb.mmem_client;
punk@13: 
punk@13:   interface CoreStats stats;
punk@13:     interface dcache = dcache.stats;
punk@13:     interface icache = icache.stats;
punk@13:     interface proc = proc.stats;
punk@13:   endinterface
punk@13: 
punk@13:   interface CPUToHost tohost = proc.tohost;
punk@13: 
punk@13: endmodule
punk@13: