punk@1: // The MIT License
punk@1: 
punk@1: // Copyright (c) 2009 Massachusetts Institute of Technology
punk@1: 
punk@1: // Permission is hereby granted, free of charge, to any person obtaining a copy
punk@1: // of this software and associated documentation files (the "Software"), to deal
punk@1: // in the Software without restriction, including without limitation the rights
punk@1: // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
punk@1: // copies of the Software, and to permit persons to whom the Software is
punk@1: // furnished to do so, subject to the following conditions:
punk@1: 
punk@1: // The above copyright notice and this permission notice shall be included in
punk@1: // all copies or substantial portions of the Software.
punk@1: 
punk@1: // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
punk@1: // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
punk@1: // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
punk@1: // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
punk@1: // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
punk@1: // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
punk@1: // THE SOFTWARE.
punk@1: 
punk@1: import Connectable::*;
punk@1: import GetPut::*;
punk@1: import ClientServer::*;
punk@1: 
punk@1: import DataCacheBlocking::*;
punk@1: import InstCacheBlocking::*;
punk@1: import Processor::*;
punk@1: import MemArb::*;
punk@1: import MemTypes::*;
punk@1: 
punk@1: interface CoreStats;
punk@1:   interface DCacheStats dcache;
punk@1:   interface ICacheStats icache;
punk@1:   interface ProcStats proc;
punk@1: endinterface
punk@1: 
punk@1: interface Core;
punk@1: 
punk@1:   // Interface from core to main memory
punk@1:   interface Client#(MainMemReq,MainMemResp) mmem_client;
punk@1: 
punk@1:   // Statistics
punk@1:   interface CoreStats stats;
punk@1: 
punk@1:   // CPU to Host
punk@1:   interface CPUToHost tohost;
punk@1: 
punk@1: endinterface
punk@1: 
punk@1: (* synthesize *)
punk@1: module mkCore(Core);
punk@1: 
punk@1:   // Instantiate the modules
punk@1:   Proc proc <- mkProc();
punk@1:   ICache#(InstReq,InstResp) icache <- mkInstCache();
punk@1:   DCache#(DataReq,DataResp) dcache <- mkDataCache();
punk@1:   MemArb marb <- mkMemArb();
punk@1: 
punk@1:   // Internal connections
punk@1:   mkConnection( proc.statsEn_get,   icache.statsEn_put );
punk@1:   mkConnection( proc.statsEn_get,   dcache.statsEn_put );
punk@1:   mkConnection( proc.imem_client,   icache.proc_server );
punk@1:   mkConnection( proc.dmem_client,   dcache.proc_server );
punk@1:   mkConnection( icache.mmem_client, marb.cache0_server );
punk@1:   mkConnection( dcache.mmem_client, marb.cache1_server );
punk@1: 
punk@1:   // Methods
punk@1:   interface mmem_client = marb.mmem_client;
punk@1: 
punk@1:   interface CoreStats stats;
punk@1:     interface dcache = dcache.stats;
punk@1:     interface icache = icache.stats;
punk@1:     interface proc = proc.stats;
punk@1:   endinterface
punk@1: 
punk@1:   interface CPUToHost tohost = proc.tohost;
punk@1: 
punk@1: endmodule
punk@1: