view modules/bluespec/Pygar/core/audioCorePipeline.bsv @ 62:90fa9b289aab pygar svn.63

[svn r63] synthesis boundaries
author punk
date Mon, 10 May 2010 21:00:49 -0400
parents 9b4f237e77e1
children 44cc00df1168
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1 // The MIT License
3 // Copyright (c) 2009 Massachusetts Institute of Technology
5 // Permission is hereby granted, free of charge, to any person obtaining a copy
6 // of this software and associated documentation files (the "Software"), to deal
7 // in the Software without restriction, including without limitation the rights
8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 // copies of the Software, and to permit persons to whom the Software is
10 // furnished to do so, subject to the following conditions:
12 // The above copyright notice and this permission notice shall be included in
13 // all copies or substantial portions of the Software.
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 // THE SOFTWARE.
23 // Author: Kermin Fleming kfleming@mit.edu
25 import Connectable::*;
26 import GetPut::*;
27 import ClientServer::*;
28 import FIFO::*;
29 import SpecialFIFOs::*;
30 import Vector::*;
32 //AWB includes
33 `include "asim/provides/low_level_platform_interface.bsh"
34 `include "asim/provides/soft_connections.bsh"
35 `include "asim/provides/common_services.bsh"
37 //Local includes
38 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface
39 `include "asim/provides/path_types.bsh"
40 `include "asim/provides/core.bsh"
41 `include "asim/provides/mixer.bsh"
42 `include "asim/provides/processor_library.bsh"
43 `include "asim/provides/fpga_components.bsh"
44 `include "asim/dict/VDEV_SCRATCH.bsh"
46 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
47 `include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
49 `define MAX_VOICES 2
51 module [CONNECTED_MODULE] mkConnectedApplication ();
53 // Core core <- mkCore(`VDEV_SCRATCH_MEMORYA);
54 // Core anotherCore <- mkCore(`VDEV_SCRATCH_MEMORYB);
55 Vector#(`MAX_VOICES, Volume) channelVols = replicate(127);
56 Mixer mixer <- mkMixer(`MAX_VOICES, channelVols); //should be max voices but 2 for now
58 Reg#(int) cycle <- mkReg(0);
59 Reg#(int) sampleCount <-mkReg(0);
60 Vector#(2, Reg#(Bool)) ac_fini <- replicateM(mkReg(False));
62 // Services Samples
63 ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();
66 //-----------------------------------------------------------
67 // Debug port
69 ServerStub_AUDIOCORERRR server_stub <- mkServerStub_AUDIOCORERRR();
71 // Create Cores
72 Vector#(`MAX_VOICES, Core) cores;
73 for (Integer n = 0; n < `MAX_VOICES; n = n + 1)
74 begin
75 case (n)
76 0 : cores[n] <- mkCore(`VDEV_SCRATCH_MEMORYA);
77 1 : cores[n] <- mkCore(`VDEV_SCRATCH_MEMORYB);
78 endcase
79 end
81 // this is for the tracing
82 rule printCycles;
83 cycle <= cycle+1;
84 $fdisplay(stderr, " => Cycle = %d", cycle);
85 endrule
87 // Send to Mixer
88 // Right now this is sorta retarded in that I pass from the output fifo into a new fifo
89 // But I have to mod a bunch of things to fix this and I am not sure I understand
90 // things well enough to do this quickly. So here it is as it is for now.
91 rule mix;
92 for (Integer i = 0; i < `MAX_VOICES; i = i + 1)
93 begin
94 let coreOut <- cores[i].sampleOutput.get();
95 mixer.toMixer(AudioStream {voice : fromInteger(i), data: tagged Valid coreOut});
96 end
98 // let coreOut <- core.sampleOutput.get();
99 // mixer.toMixer(AudioStream {voice : 0, data : tagged Valid coreOut});
100 // mixer.toMixer(AudioStream {voice : 1, data : tagged Valid anotherOut});
101 endrule
103 rule feedOutput;
104 let pipeOut <- mixer.mainOut.get();
106 AudioProcessorControl endOfFileTag = EndOfFile;
107 AudioProcessorControl sampleTag = Data;
109 sampleCount <= sampleCount+1;
111 $display("PIPE writes sample %d", sampleCount);
112 case (pipeOut) matches
113 tagged EndOfFile:
114 begin
115 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
116 ac_fini[0] <= True;
117 end
118 tagged Sample .sample:
119 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
120 endcase
121 endrule
123 // Can generally just stick with the EOF but since I have two Cores no mixer...
124 /*(* conservative_implicit_conditions *)
125 rule sendTerminate;
126 Bool done = True;
127 for (Integer i = 1; i < 2; i = i+1)
128 done = ac_fini[i] && done;
130 if (done)
131 client_stub.makeRequest_SendTerminate(zeroExtend(pack(1)));
133 endrule
134 */
136 //***** SERVER Side *****
138 (* conservative_implicit_conditions *)
139 rule feedInput;
140 let command <- server_stub.acceptRequest_SendUnprocessedStream();
141 AudioProcessorControl ctrl = unpack(truncate(command.ctrl));
143 VoiceId channel = unpack(truncate(command.channel));
144 // $display("rlm: %x", test);
146 AudioProcessorUnit inSample;
148 if(ctrl == EndOfFile)
149 begin
150 $display("lsp: PIPE received EOF ");
151 inSample = tagged EndOfFile;
152 // core.sampleInput.put(tagged EndOfFile);
153 end
154 else
155 begin
156 // $display("lsp: PIPE received Data ");
157 // core.sampleInput.put(tagged Sample unpack(truncate(command.sample)));
158 inSample = tagged Sample unpack(truncate(command.sample));
159 end
161 cores[channel].sampleInput.put(inSample);
163 endrule
164 endmodule