Mercurial > pygar
view modules/bluespec/Pygar/lab4/MemTypes.bsv @ 36:99519a031813 pygar svn.37
[svn r37] moved the server into audioCorePipeline
author | punk |
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date | Tue, 04 May 2010 18:54:54 -0400 |
parents | 74716e9a81cc |
children |
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1 import Trace::*;3 //----------------------------------------------------------------------4 // Basic memory requests and responses5 //----------------------------------------------------------------------7 typedef union tagged8 {9 struct { Bit#(addrSz) addr; Bit#(tagSz) tag; } LoadReq;10 struct { Bit#(addrSz) addr; Bit#(tagSz) tag; Bit#(dataSz) data; } StoreReq;11 }12 MemReq#( type addrSz, type tagSz, type dataSz )13 deriving(Eq,Bits);15 typedef union tagged16 {17 struct { Bit#(tagSz) tag; Bit#(dataSz) data; } LoadResp;18 struct { Bit#(tagSz) tag; } StoreResp;19 }20 MemResp#( type tagSz, type dataSz )21 deriving(Eq,Bits);23 //----------------------------------------------------------------------24 // Specialized req/resp for inst/data/host25 //----------------------------------------------------------------------27 typedef 32 AddrSz;28 typedef 08 TagSz;29 typedef 32 DataSz;30 typedef 32 InstSz;31 typedef 32 HostDataSz;33 typedef MemReq#(AddrSz,TagSz,0) InstReq;34 typedef MemResp#(TagSz,InstSz) InstResp;36 typedef MemReq#(AddrSz,TagSz,DataSz) DataReq;37 typedef MemResp#(TagSz,DataSz) DataResp;39 typedef MemReq#(AddrSz,TagSz,HostDataSz) HostReq;40 typedef MemResp#(TagSz,HostDataSz) HostResp;42 //----------------------------------------------------------------------43 // Specialized req/resp for main memory44 //----------------------------------------------------------------------46 typedef 32 MainMemAddrSz;47 typedef 08 MainMemTagSz;48 typedef 32 MainMemDataSz;50 typedef MemReq#(MainMemAddrSz,MainMemTagSz,MainMemDataSz) MainMemReq;51 typedef MemResp#(MainMemTagSz,MainMemDataSz) MainMemResp;53 //----------------------------------------------------------------------54 // Tracing Functions55 //----------------------------------------------------------------------57 instance Traceable#(MemReq#(a,b,c));59 function Action traceTiny( String loc, String ttag, MemReq#(a,b,c) req );60 case ( req ) matches61 tagged LoadReq .ld : $fdisplay(stderr, " => %s:%s l%2x", loc, ttag, ld.tag );62 tagged StoreReq .st : $fdisplay(stderr, " => %s:%s s%2x", loc, ttag, st.tag );63 endcase64 endfunction66 function Action traceFull( String loc, String ttag, MemReq#(a,b,c) req );67 case ( req ) matches68 tagged LoadReq .ld : $fdisplay(stderr, " => %s:%s Ld { addr=%x, tag=%x }", loc, ttag, ld.addr, ld.tag );69 tagged StoreReq .st : $fdisplay(stderr, " => %s:%s St { addr=%x, tag=%x, data=%x }", loc, ttag, st.addr, st.tag, st.data );70 endcase71 endfunction73 endinstance75 instance Traceable#(MemResp#(a,b));77 function Action traceTiny( String loc, String ttag, MemResp#(a,b) resp );78 case ( resp ) matches79 tagged LoadResp .ld : $fdisplay(stderr, " => %s:%s l%2x", loc, ttag, ld.tag );80 tagged StoreResp .st : $fdisplay(stderr, " => %s:%s s%2x", loc, ttag, st.tag );81 endcase82 endfunction84 function Action traceFull( String loc, String ttag, MemResp#(a,b) resp );85 case ( resp ) matches86 tagged LoadResp .ld : $fdisplay(stderr, " => %s:%s Ld { tag=%x, data=%x }", loc, ttag, ld.tag, ld.data );87 tagged StoreResp .st : $fdisplay(stderr, " => %s:%s St { tag=%x }", loc, ttag, st.tag );88 endcase89 endfunction91 endinstance