Mercurial > pygar
view core/sim/bdir_dut/MemTypes.bi @ 11:50af57801d6e pygar svn.12
[svn r12] working on getting audio pipe processor working
author | punk |
---|---|
date | Sun, 25 Apr 2010 08:31:47 -0400 |
parents | 91a1f76ddd62 |
children |
line wrap: on
line source
1 signature MemTypes where {2 import ¶Counter®¶;4 import ¶FIFOF_®¶;6 import ¶FIFOF®¶;8 import ¶FIFO®¶;10 import ¶Inout®¶;12 import ¶List®¶;14 import ¶Clocks®¶;16 import ¶ListN®¶;18 import ¶PrimArray®¶;20 import ¶Vector®¶;22 import ¶Connectable®¶;24 import ¶GetPut®¶;26 import ¶ClientServer®¶;28 import Trace;30 data (MemTypes.MemReq :: # -> # -> # -> *) addrSz tagSz dataSz =31 MemTypes.LoadReq (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz) |32 MemTypes.StoreReq (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz);34 instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.MemReq addrSz tagSz dataSz);36 instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.MemReq addrSz tagSz dataSz);38 instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.MemReq addrSz tagSz dataSz);40 instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.MemReq addrSz tagSz dataSz);42 instance MemTypes (¶Prelude®¶.¶Add®¶ 1 _v103 _v100,43 ¶Prelude®¶.¶Max®¶ _v101 _v104 _v103,44 ¶Prelude®¶.¶Add®¶ _v105 _v104 _v103,45 ¶Prelude®¶.¶Add®¶ _v102 _v101 _v103,46 ¶Prelude®¶.¶Add®¶ addrSz _v106 _v104,47 ¶Prelude®¶.¶Add®¶ tagSz dataSz _v106,48 ¶Prelude®¶.¶Add®¶ addrSz tagSz _v101) =>49 ¶Prelude®¶.¶Bits®¶ (MemTypes.MemReq addrSz tagSz dataSz) _v100;51 struct (MemTypes.¶MemReq_$LoadReq¶ :: # -> # -> # -> *) addrSz tagSz dataSz = {52 MemTypes.addr :: ¶Prelude®¶.¶Bit®¶ addrSz;53 MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz54 };56 instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz);58 instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz);60 instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶61 (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz);63 instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemReq_$LoadReq¶ addrSz tagSz dataSz);65 instance MemTypes (¶Prelude®¶.¶Add®¶ _v101 _v104 _v100) =>66 ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemReq_$LoadReq¶ _v101 _v104 dataSz) _v100;68 struct (MemTypes.¶MemReq_$StoreReq¶ :: # -> # -> # -> *) addrSz tagSz dataSz = {69 MemTypes.addr :: ¶Prelude®¶.¶Bit®¶ addrSz;70 MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz;71 MemTypes.¡data¡ :: ¶Prelude®¶.¶Bit®¶ dataSz72 };74 instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz);76 instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz);78 instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶79 (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz);81 instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemReq_$StoreReq¶ addrSz tagSz dataSz);83 instance MemTypes (¶Prelude®¶.¶Add®¶ _v101 _v100 _v103, ¶Prelude®¶.¶Add®¶ _v104 _v107 _v100) =>84 ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemReq_$StoreReq¶ _v101 _v104 _v107) _v103;86 data (MemTypes.MemResp :: # -> # -> *) tagSz dataSz =87 MemTypes.LoadResp (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz) |88 MemTypes.StoreResp (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz);90 instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.MemResp tagSz dataSz);92 instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.MemResp tagSz dataSz);94 instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.MemResp tagSz dataSz);96 instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.MemResp tagSz dataSz);98 instance MemTypes (¶Prelude®¶.¶Add®¶ 1 _v103 _v100,99 ¶Prelude®¶.¶Max®¶ _v101 _v104 _v103,100 ¶Prelude®¶.¶Add®¶ _v105 _v104 _v103,101 ¶Prelude®¶.¶Add®¶ _v102 _v101 _v103,102 ¶Prelude®¶.¶Add®¶ _v104 dataSz _v101) =>103 ¶Prelude®¶.¶Bits®¶ (MemTypes.MemResp _v104 dataSz) _v100;105 struct (MemTypes.¶MemResp_$LoadResp¶ :: # -> # -> *) tagSz dataSz = {106 MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz;107 MemTypes.¡data¡ :: ¶Prelude®¶.¶Bit®¶ dataSz108 };110 instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz);112 instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz);114 instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz);116 instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemResp_$LoadResp¶ tagSz dataSz);118 instance MemTypes (¶Prelude®¶.¶Add®¶ _v101 _v104 _v100) =>119 ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemResp_$LoadResp¶ _v101 _v104) _v100;121 struct (MemTypes.¶MemResp_$StoreResp¶ :: # -> # -> *) tagSz dataSz = {122 MemTypes.tag :: ¶Prelude®¶.¶Bit®¶ tagSz123 };125 instance MemTypes ¶Prelude®¶.¶PrimMakeUndefined®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz);127 instance MemTypes ¶Prelude®¶.¶PrimDeepSeqCond®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz);129 instance MemTypes ¶Prelude®¶.¶PrimMakeUninitialized®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz);131 instance MemTypes ¶Prelude®¶.¶Eq®¶ (MemTypes.¶MemResp_$StoreResp¶ tagSz dataSz);133 instance MemTypes ¶Prelude®¶.¶Bits®¶ (MemTypes.¶MemResp_$StoreResp¶ _v101 dataSz) _v101;135 type (MemTypes.AddrSz :: #) = 32;137 type (MemTypes.TagSz :: #) = 8;139 type (MemTypes.DataSz :: #) = 32;141 type (MemTypes.InstSz :: #) = 32;143 type (MemTypes.HostDataSz :: #) = 32;145 type (MemTypes.InstReq :: *) = MemTypes.MemReq MemTypes.AddrSz MemTypes.TagSz 0;147 type (MemTypes.InstResp :: *) = MemTypes.MemResp MemTypes.TagSz MemTypes.InstSz;149 type (MemTypes.DataReq :: *) = MemTypes.MemReq MemTypes.AddrSz MemTypes.TagSz MemTypes.DataSz;151 type (MemTypes.DataResp :: *) = MemTypes.MemResp MemTypes.TagSz MemTypes.DataSz;153 type (MemTypes.HostReq :: *) = MemTypes.MemReq MemTypes.AddrSz MemTypes.TagSz MemTypes.HostDataSz;155 type (MemTypes.HostResp :: *) = MemTypes.MemResp MemTypes.TagSz MemTypes.HostDataSz;157 type (MemTypes.MainMemAddrSz :: #) = 32;159 type (MemTypes.MainMemTagSz :: #) = 8;161 type (MemTypes.MainMemDataSz :: #) = 32;163 type (MemTypes.MainMemReq :: *) =164 MemTypes.MemReq MemTypes.MainMemAddrSz MemTypes.MainMemTagSz MemTypes.MainMemDataSz;166 type (MemTypes.MainMemResp :: *) = MemTypes.MemResp MemTypes.MainMemTagSz MemTypes.MainMemDataSz;168 instance MemTypes Trace.Traceable (MemTypes.MemReq a b c);170 instance MemTypes Trace.Traceable (MemTypes.MemResp a b)171 }