Mercurial > pygar
view modules/bluespec/Pygar/core/audioPipe.bsv @ 68:44cc00df1168 pygar svn.69
[svn r69] runs separate eofs (I think)
author | punk |
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date | Wed, 12 May 2010 00:06:05 -0400 |
parents | 2c8166d205d5 |
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1 // The MIT License3 // Copyright (c) 2009 Massachusetts Institute of Technology5 // Permission is hereby granted, free of charge, to any person obtaining a copy6 // of this software and associated documentation files (the "Software"), to deal7 // in the Software without restriction, including without limitation the rights8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell9 // copies of the Software, and to permit persons to whom the Software is10 // furnished to do so, subject to the following conditions:12 // The above copyright notice and this permission notice shall be included in13 // all copies or substantial portions of the Software.15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN21 // THE SOFTWARE.23 // Author: Kermin Fleming kfleming@mit.edu25 import Connectable::*;26 import GetPut::*;27 import ClientServer::*;28 import FIFO::*;29 import SpecialFIFOs::*;31 //AWB includes32 `include "asim/provides/low_level_platform_interface.bsh"33 `include "asim/provides/soft_connections.bsh"34 `include "asim/provides/common_services.bsh"36 //Local includes37 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface38 `include "asim/provides/core.bsh"39 `include "asim/provides/processor_library.bsh"40 `include "asim/provides/fpga_components.bsh"41 `include "asim/provides/scratchpad_memory.bsh"42 `include "asim/provides/mem_services.bsh"43 `include "asim/dict/VDEV_SCRATCH.bsh"45 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"46 //`include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"48 function49 module [CONNECTED_MODULE] mkConnectedApplication ();50 Core core <- mkCore;51 Reg#(int) cycle <- mkReg(0);54 //get volumes55 //mkMixer();57 //External memory58 // I'm not comfortable assuming that the memory subsystem is in order59 // So I'll insert a completion buffer here.60 MEMORY_IFC#(Bit#(18), Bit#(32)) memory <- mkScratchpad(`VDEV_SCRATCH_MEMORY, SCRATCHPAD_CACHED); //Services Memory items62 // Services Samples63 ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();64 // Make this big enough so that several outstanding requests may be supported65 FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8);67 // this is for the tracing68 rule printCycles;69 cycle <= cycle+1;70 $fdisplay(stderr, " => Cycle = %d", cycle);71 endrule73 rule sendMemReq;74 let coreReq <- core.mmem_client.request.get;75 case (coreReq) matches76 tagged LoadReq .load: begin77 //Allocate ROB space78 memory.readReq(truncate(load.addr>>2));79 tags.enq(load.tag);80 end81 tagged StoreReq .store: begin82 memory.write(truncate(store.addr>>2),store.data);83 end84 endcase85 endrule87 rule receiveMemResp;88 let memResp <- memory.readRsp();89 tags.deq;90 core.mmem_client.response.put(tagged LoadResp {data:memResp,91 tag: tags.first});92 endrule94 rule feedOutput;95 let pipelineData <- core.sampleOutput.get();96 AudioProcessorControl endOfFileTag = EndOfFile;97 AudioProcessorControl sampleTag = Data;99 case (pipelineData) matches100 tagged EndOfFile:101 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);102 tagged Sample .sample:client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));103 endcase104 endrule106 endmodule