view modules/bluespec/Pygar/core/audioCorePipeline.bsv @ 53:2991344775f8 pygar svn.54

[svn r54] mixer integrated
author punk
date Sun, 09 May 2010 10:58:40 -0400
parents 49049f97312c
children 9b4f237e77e1
line wrap: on
line source
1 // The MIT License
3 // Copyright (c) 2009 Massachusetts Institute of Technology
5 // Permission is hereby granted, free of charge, to any person obtaining a copy
6 // of this software and associated documentation files (the "Software"), to deal
7 // in the Software without restriction, including without limitation the rights
8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 // copies of the Software, and to permit persons to whom the Software is
10 // furnished to do so, subject to the following conditions:
12 // The above copyright notice and this permission notice shall be included in
13 // all copies or substantial portions of the Software.
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 // THE SOFTWARE.
23 // Author: Kermin Fleming kfleming@mit.edu
25 import Connectable::*;
26 import GetPut::*;
27 import ClientServer::*;
28 import FIFO::*;
29 import SpecialFIFOs::*;
30 import Vector::*;
32 //AWB includes
33 `include "asim/provides/low_level_platform_interface.bsh"
34 `include "asim/provides/soft_connections.bsh"
35 `include "asim/provides/common_services.bsh"
37 //Local includes
38 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface
39 `include "asim/provides/path_types.bsh"
40 `include "asim/provides/core.bsh"
41 `include "asim/provides/mixer.bsh"
42 `include "asim/provides/processor_library.bsh"
43 `include "asim/provides/fpga_components.bsh"
44 `include "asim/dict/VDEV_SCRATCH.bsh"
46 `include "asim/rrr/remote_client_stub_AUDIOCORERRR.bsh"
47 `include "asim/rrr/remote_server_stub_AUDIOCORERRR.bsh"
49 module [CONNECTED_MODULE] mkConnectedApplication ();
50 Core core <- mkCore(`VDEV_SCRATCH_MEMORYA);
51 Core anotherCore <- mkCore(`VDEV_SCRATCH_MEMORYB);
52 Vector#(2, Volume) channelVols = replicate(127);
53 Mixer mixer <- mkMixer(2, channelVols); //should be max voices but 2 for now
55 Reg#(int) cycle <- mkReg(0);
56 Reg#(int) sampleCount <-mkReg(0);
57 Vector#(2, Reg#(Bool)) ac_fini <- replicateM(mkReg(False));
59 // FIFO#(AudioProcessorUnit) coreOut <- mkFIFO();
60 // Services Samples
61 ClientStub_AUDIOCORERRR client_stub <- mkClientStub_AUDIOCORERRR();
64 //-----------------------------------------------------------
65 // Debug port
67 ServerStub_AUDIOCORERRR server_stub <- mkServerStub_AUDIOCORERRR();
70 // this is for the tracing
71 rule printCycles;
72 cycle <= cycle+1;
73 $fdisplay(stderr, " => Cycle = %d", cycle);
74 endrule
76 // Send to Mixer
77 // Right now this is sorta retarded in that I pass from the output fifo into a new fifo
78 // But I have to mod a bunch of things to fix this and I am not sure I understand
79 // things well enough to do this quickly. So here it is as it is for now.
80 rule mix;
81 let coreOut <- core.sampleOutput.get();
82 let anotherOut <- anotherCore.sampleOutput.get();
83 mixer.toMixer(AudioStream {voice : 0, data : tagged Valid coreOut});
84 mixer.toMixer(AudioStream {voice : 1, data : tagged Valid anotherOut});
85 endrule
87 rule feedOutput;
88 // let pipelineData <- core.sampleOutput.get();
89 let pipeOut <- mixer.mainOut.get();
91 AudioProcessorControl endOfFileTag = EndOfFile;
92 AudioProcessorControl sampleTag = Data;
94 sampleCount <= sampleCount+1;
96 $display("PIPE writes sample %x\n", sampleCount);
97 case (pipeOut) matches
98 tagged EndOfFile:
99 begin
100 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
101 ac_fini[0] <= True;
102 end
103 tagged Sample .sample:
104 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
105 endcase
106 endrule
108 // Programming ghetto style!
109 // right now I am repeating this rule for my second core.
110 /* (* conservative_implicit_conditions *)
111 rule feedAnotherOutput;
112 let pipelineData <- anotherCore.sampleOutput.get();
113 AudioProcessorControl endOfFileTag = EndOfFile;
114 AudioProcessorControl sampleTag = Data;
116 $display("PIPE writes another sample\n");
117 case (pipelineData) matches
118 tagged EndOfFile:
119 begin
120 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(endOfFileTag)),?);
121 ac_fini[1] <= True;
122 end
123 tagged Sample .sample:
124 client_stub.makeRequest_SendProcessedStream(zeroExtend(pack(sampleTag)), zeroExtend(pack(sample)));
125 endcase
126 endrule
127 */
129 // Can generally just stick with the EOF but since I have two Cores no mixer...
130 /*(* conservative_implicit_conditions *)
131 rule sendTerminate;
132 Bool done = True;
133 for (Integer i = 1; i < 2; i = i+1)
134 done = ac_fini[i] && done;
136 if (done)
137 client_stub.makeRequest_SendTerminate(zeroExtend(pack(1)));
139 endrule
140 */
142 //***** SERVER Side *****
144 (* conservative_implicit_conditions *)
145 rule feedInput;
146 let command <- server_stub.acceptRequest_SendUnprocessedStream();
147 AudioProcessorControl ctrl = unpack(truncate(command.ctrl));
149 VoiceId channel = unpack(truncate(command.channel));
150 // $display("rlm: %x", test);
152 AudioProcessorUnit inSample;
154 if(ctrl == EndOfFile)
155 begin
156 $display("lsp: PIPE received EOF ");
157 inSample = tagged EndOfFile;
158 // core.sampleInput.put(tagged EndOfFile);
159 end
160 else
161 begin
162 // $display("lsp: PIPE received Data ");
163 // core.sampleInput.put(tagged Sample unpack(truncate(command.sample)));
164 inSample = tagged Sample unpack(truncate(command.sample));
165 end
167 case (channel)
168 0 : core.sampleInput.put(inSample);
169 1 : anotherCore.sampleInput.put(inSample);
170 endcase
172 endrule
173 endmodule