Mercurial > pygar
view modules/bluespec/Pygar/lab1/FIRFilterPipeline.bsv @ 37:0475235d1513 pygar svn.38
[svn r38] fixed audiocorepipe
author | punk |
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date | Tue, 04 May 2010 19:25:30 -0400 |
parents | 74716e9a81cc |
children |
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1 // The MIT License3 // Copyright (c) 2009 Massachusetts Institute of Technology5 // Permission is hereby granted, free of charge, to any person obtaining a copy6 // of this software and associated documentation files (the "Software"), to deal7 // in the Software without restriction, including without limitation the rights8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell9 // copies of the Software, and to permit persons to whom the Software is10 // furnished to do so, subject to the following conditions:12 // The above copyright notice and this permission notice shall be included in13 // all copies or substantial portions of the Software.15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN21 // THE SOFTWARE.23 // Author: Kermin Fleming kfleming@mit.edu25 import Connectable::*;26 import GetPut::*;27 import ClientServer::*;28 import FIFO::*;30 //AWB includes31 `include "asim/provides/low_level_platform_interface.bsh"32 `include "asim/provides/soft_connections.bsh"33 `include "asim/provides/common_services.bsh"35 //Local includes36 `include "asim/provides/audio_processor_types.bsh"37 `include "asim/provides/audio_pipeline_types.bsh"38 `include "asim/provides/fir_filter.bsh"40 module [Connected_Module] mkAudioPipeline (AudioPipeline);41 FIRFilter filter <- mkFIRFilter;43 interface sampleInput = filter.sampleInput;44 interface sampleOutput = filter.sampleOutput;46 endmodule