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diff modules/bluespec/Pygar/core/audioCore.bsv @ 65:cf8bb3038cbd pygar svn.66

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[svn r66] sim passes
author punk
date Tue, 11 May 2010 09:05:22 -0400
parents 9fe5ed4af92d
children 44cc00df1168
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line diff
     1.1 --- a/modules/bluespec/Pygar/core/audioCore.bsv	Mon May 10 23:16:14 2010 -0400
     1.2 +++ b/modules/bluespec/Pygar/core/audioCore.bsv	Tue May 11 09:05:22 2010 -0400
     1.3 @@ -83,13 +83,13 @@
     1.4      let coreReq <- marb.mmem_client.request.get;
     1.5      case (coreReq) matches 
     1.6        tagged LoadReq .load: begin
     1.7 -//	                      $display("PIPE Load Addr Req %h", load.addr); 
     1.8 +	                      $display("CORE: Load Addr Req %h", load.addr); 
     1.9                                //Allocate ROB space
    1.10                                memory.readReq(truncate(load.addr>>2));
    1.11                                tags.enq(load.tag);
    1.12                              end
    1.13        tagged StoreReq .store: begin
    1.14 -//	  	              $display("PIPE Write Addr Req %h", store.addr); 
    1.15 +	  	              $display("CORE: Write Addr Req %h", store.addr); 
    1.16  	                      memory.write(truncate(store.addr>>2),store.data);
    1.17                                end
    1.18      endcase
    1.19 @@ -100,7 +100,7 @@
    1.20      tags.deq;
    1.21      marb.mmem_client.response.put(tagged LoadResp {data:memResp,
    1.22                                                     tag: tags.first});
    1.23 -//   	                $display("PIPE Receive MemReq %x", memResp); 
    1.24 +   	                $display("CORE: Receive MemReq %x", memResp); 
    1.25    endrule
    1.26  
    1.27    // Methods