Mercurial > pygar
diff modules/bluespec/Pygar/core/Processor.bsv @ 43:4d87fa55a776 pygar svn.44
[svn r44] processor largely working and mixer in good status
author | punk |
---|---|
date | Wed, 05 May 2010 12:28:07 -0400 |
parents | ced2ebd41347 |
children | 61f6267cb3db |
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1.1 --- a/modules/bluespec/Pygar/core/Processor.bsv Wed May 05 01:09:09 2010 -0400 1.2 +++ b/modules/bluespec/Pygar/core/Processor.bsv Wed May 05 12:28:07 2010 -0400 1.3 @@ -252,7 +252,7 @@ 1.4 FIFO#(DataResp) dataRespQ <- mkFIFO(); 1.5 1.6 // Audio I/O 1.7 - FIFO#(AudioProcessorUnit) inAudioFifo <- mkFIFO; 1.8 + FIFO#(AudioProcessorUnit) inAudioFifo <- mkSizedFIFO(512); 1.9 FIFO#(AudioProcessorUnit) outAudioFifo <- mkFIFO; 1.10 1.11 1.12 @@ -372,7 +372,6 @@ 1.13 end 1.14 tagged LUI .it : 1.15 begin 1.16 - $display("PROCESSOR Instr LUI\n"); 1.17 Bit#(32) zext_it_imm = zext(it.imm); 1.18 wbQ.enq(tagged WB_ALU {dest: it.rdst, data:(zext_it_imm << 32'd16) }); 1.19 end 1.20 @@ -458,14 +457,12 @@ 1.21 1.22 tagged JR .it : 1.23 begin 1.24 - $display("PROCESSOR inst JR\n"); 1.25 newPC = rf.rd1(it.rsrc); 1.26 branchTaken = True; 1.27 end 1.28 1.29 tagged JAL .it : 1.30 begin 1.31 - $display("PROCESSOR inst JAL\n"); 1.32 wbQ.enq(tagged WB_ALU {dest:31, data:pc_plus4 }); 1.33 newPC = { pc_plus4[31:28], it.target, 2'b0 }; 1.34 branchTaken = True; 1.35 @@ -482,7 +479,7 @@ 1.36 1.37 tagged MTC0 .it : //Recieve things from host computer 1.38 begin 1.39 - $display( " PROCESSOR MTC0 call\n"); 1.40 +// $display( " PROCESSOR MTC0 call\n"); 1.41 case ( it.cop0dst ) 1.42 5'd10 : cp0_statsEn <= unpack(truncate(rf.rd1(it.rsrc))); 1.43 5'd21 : cp0_tohost <= truncate(rf.rd1(it.rsrc)); 1.44 @@ -497,22 +494,21 @@ 1.45 //this is host stuff? 1.46 tagged MFC0 .it : //Things out 1.47 begin 1.48 - $display( " PROCESSOR MFC0 call\n"); 1.49 case ( it.cop0src ) 1.50 // not actually an ALU instruction but don't have the format otherwise 1.51 5'd10 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_statsEn)) }); 1.52 5'd20 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_fromhost }); 1.53 5'd21 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_tohost }); 1.54 5'd25 : begin 1.55 - $display( "**** EOF Requested\n "); 1.56 +// $display( "**** EOF Requested\n "); 1.57 wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_audioEOF)) }); // Reading clears bit 1.58 cp0_audioEOF <= False; 1.59 end 1.60 5'd28 : begin 1.61 - $display( "***** Reqesting Sample \n"); 1.62 +// $display( "***** Reqesting Sample \n"); 1.63 let sample = inAudioFifo.first(); // is this going to cause perf. delay? 1.64 if (sample matches tagged Sample .audio) // if it is EOF another rule sets the cp0_audioEOF 1.65 - wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) }); // do I need pack? 1.66 + wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) }); // do I need pack? 1.67 else $display ( "Audio File EOF Reached. Invalid sample request."); 1.68 inAudioFifo.deq(); 1.69 end 1.70 @@ -570,26 +566,27 @@ 1.71 num_cycles.incr(); 1.72 endrule 1.73 1.74 - 1.75 +/* 1.76 // for now, we don't do anything. 1.77 -// rule connectAudioReqResp; 1.78 -// $display("rlm: PROCESSOR copies a datum\n"); 1.79 -// outAudioFifo.enq(inAudioFifo.first()); 1.80 -// inAudioFifo.deq; 1.81 -// endrule 1.82 + rule connectAudioReqResp; 1.83 + $display("rlm: PROCESSOR copies a datum\n"); 1.84 + outAudioFifo.enq(inAudioFifo.first()); 1.85 + inAudioFifo.deq; 1.86 + endrule 1.87 +*/ 1.88 1.89 rule flagAudioEnd (inAudioFifo.first() matches tagged EndOfFile); 1.90 $display (" PROCESSOR End Audio Flag Set "); 1.91 cp0_audioEOF <= True; 1.92 inAudioFifo.deq; 1.93 endrule 1.94 -/* 1.95 + 1.96 rule sendAudioEnd (cp0_progComp); 1.97 $display (" PROCESSOR Says Program Complete "); 1.98 outAudioFifo.enq(tagged EndOfFile); 1.99 cp0_progComp <= False; //only send one. And functions to reset 1.100 endrule 1.101 -*/ 1.102 + 1.103 1.104 //----------------------------------------------------------- 1.105 // Methods