Mercurial > pygar
comparison modules/bluespec/Pygar/core/audioCore.bsv @ 65:cf8bb3038cbd pygar svn.66
[svn r66] sim passes
author | punk |
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date | Tue, 11 May 2010 09:05:22 -0400 |
parents | 9fe5ed4af92d |
children | 44cc00df1168 |
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64:bf08daea854e | 65:cf8bb3038cbd |
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81 // Memory Access | 81 // Memory Access |
82 rule sendMemReq; | 82 rule sendMemReq; |
83 let coreReq <- marb.mmem_client.request.get; | 83 let coreReq <- marb.mmem_client.request.get; |
84 case (coreReq) matches | 84 case (coreReq) matches |
85 tagged LoadReq .load: begin | 85 tagged LoadReq .load: begin |
86 // $display("PIPE Load Addr Req %h", load.addr); | 86 $display("CORE: Load Addr Req %h", load.addr); |
87 //Allocate ROB space | 87 //Allocate ROB space |
88 memory.readReq(truncate(load.addr>>2)); | 88 memory.readReq(truncate(load.addr>>2)); |
89 tags.enq(load.tag); | 89 tags.enq(load.tag); |
90 end | 90 end |
91 tagged StoreReq .store: begin | 91 tagged StoreReq .store: begin |
92 // $display("PIPE Write Addr Req %h", store.addr); | 92 $display("CORE: Write Addr Req %h", store.addr); |
93 memory.write(truncate(store.addr>>2),store.data); | 93 memory.write(truncate(store.addr>>2),store.data); |
94 end | 94 end |
95 endcase | 95 endcase |
96 endrule | 96 endrule |
97 | 97 |
98 rule receiveMemResp; | 98 rule receiveMemResp; |
99 let memResp <- memory.readRsp(); | 99 let memResp <- memory.readRsp(); |
100 tags.deq; | 100 tags.deq; |
101 marb.mmem_client.response.put(tagged LoadResp {data:memResp, | 101 marb.mmem_client.response.put(tagged LoadResp {data:memResp, |
102 tag: tags.first}); | 102 tag: tags.first}); |
103 // $display("PIPE Receive MemReq %x", memResp); | 103 $display("CORE: Receive MemReq %x", memResp); |
104 endrule | 104 endrule |
105 | 105 |
106 // Methods | 106 // Methods |
107 | 107 |
108 interface sampleOutput = proc.sampleOutput; | 108 interface sampleOutput = proc.sampleOutput; |