Mercurial > pygar
comparison modules/bluespec/Pygar/core/audioCorePipeline.bsv @ 42:ced2ebd41347 pygar svn.43
[svn r43] bunch of updates that almost work...
author | punk |
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date | Wed, 05 May 2010 01:09:09 -0400 |
parents | 16ba43f0a7c3 |
children | 4d87fa55a776 |
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41:16ba43f0a7c3 | 42:ced2ebd41347 |
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35 | 35 |
36 //Local includes | 36 //Local includes |
37 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface | 37 `include "asim/provides/audio_pipe_types.bsh" //provides Audio Pipeline interface |
38 `include "asim/provides/path_types.bsh" | 38 `include "asim/provides/path_types.bsh" |
39 `include "asim/provides/core.bsh" | 39 `include "asim/provides/core.bsh" |
40 //`include "asim/provides/mixer.bsh" | |
40 `include "asim/provides/processor_library.bsh" | 41 `include "asim/provides/processor_library.bsh" |
41 `include "asim/provides/fpga_components.bsh" | 42 `include "asim/provides/fpga_components.bsh" |
42 `include "asim/provides/scratchpad_memory.bsh" | 43 `include "asim/provides/scratchpad_memory.bsh" |
43 `include "asim/provides/mem_services.bsh" | 44 `include "asim/provides/mem_services.bsh" |
44 `include "asim/dict/VDEV_SCRATCH.bsh" | 45 `include "asim/dict/VDEV_SCRATCH.bsh" |
76 | 77 |
77 rule sendMemReq; | 78 rule sendMemReq; |
78 let coreReq <- core.mmem_client.request.get; | 79 let coreReq <- core.mmem_client.request.get; |
79 case (coreReq) matches | 80 case (coreReq) matches |
80 tagged LoadReq .load: begin | 81 tagged LoadReq .load: begin |
82 $display("PIPE Load Addr Req %x", load.addr); | |
81 //Allocate ROB space | 83 //Allocate ROB space |
82 memory.readReq(truncate(load.addr>>2)); | 84 memory.readReq(truncate(load.addr>>2)); |
83 tags.enq(load.tag); | 85 tags.enq(load.tag); |
84 end | 86 end |
85 tagged StoreReq .store: begin | 87 tagged StoreReq .store: begin |
88 $display("PIPE Write Addr Req %x", store.addr); | |
86 memory.write(truncate(store.addr>>2),store.data); | 89 memory.write(truncate(store.addr>>2),store.data); |
87 end | 90 end |
88 endcase | 91 endcase |
89 endrule | 92 endrule |
90 | 93 |
91 rule receiveMemResp; | 94 rule receiveMemResp; |
92 let memResp <- memory.readRsp(); | 95 let memResp <- memory.readRsp(); |
93 tags.deq; | 96 tags.deq; |
94 core.mmem_client.response.put(tagged LoadResp {data:memResp, | 97 core.mmem_client.response.put(tagged LoadResp {data:memResp, |
95 tag: tags.first}); | 98 tag: tags.first}); |
99 $display("PIPE Receive MemReq %x", memResp); | |
96 endrule | 100 endrule |
97 | 101 |
98 rule feedOutput; | 102 rule feedOutput; |
99 let pipelineData <- core.sampleOutput.get(); | 103 let pipelineData <- core.sampleOutput.get(); |
100 AudioProcessorControl endOfFileTag = EndOfFile; | 104 AudioProcessorControl endOfFileTag = EndOfFile; |