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comparison modules/bluespec/Pygar/core/Processor.bsv @ 43:4d87fa55a776 pygar svn.44

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[svn r44] processor largely working and mixer in good status
author punk
date Wed, 05 May 2010 12:28:07 -0400
parents ced2ebd41347
children 61f6267cb3db
comparison
equal deleted inserted replaced
42:ced2ebd41347 43:4d87fa55a776
250 250
251 FIFO#(DataReq) dataReqQ <- mkBFIFO1(); 251 FIFO#(DataReq) dataReqQ <- mkBFIFO1();
252 FIFO#(DataResp) dataRespQ <- mkFIFO(); 252 FIFO#(DataResp) dataRespQ <- mkFIFO();
253 253
254 // Audio I/O 254 // Audio I/O
255 FIFO#(AudioProcessorUnit) inAudioFifo <- mkFIFO; 255 FIFO#(AudioProcessorUnit) inAudioFifo <- mkSizedFIFO(512);
256 FIFO#(AudioProcessorUnit) outAudioFifo <- mkFIFO; 256 FIFO#(AudioProcessorUnit) outAudioFifo <- mkFIFO;
257 257
258 258
259 // Statistics state (2010) 259 // Statistics state (2010)
260 // Reg#(Stat) num_cycles <- mkReg(0); 260 // Reg#(Stat) num_cycles <- mkReg(0);
370 Bit#(32) zext_it_imm = zext(it.imm); 370 Bit#(32) zext_it_imm = zext(it.imm);
371 wbQ.enq(tagged WB_ALU {dest: it.rdst, data:(rf.rd1(it.rsrc) ^ zext_it_imm )}); 371 wbQ.enq(tagged WB_ALU {dest: it.rdst, data:(rf.rd1(it.rsrc) ^ zext_it_imm )});
372 end 372 end
373 tagged LUI .it : 373 tagged LUI .it :
374 begin 374 begin
375 $display("PROCESSOR Instr LUI\n");
376 Bit#(32) zext_it_imm = zext(it.imm); 375 Bit#(32) zext_it_imm = zext(it.imm);
377 wbQ.enq(tagged WB_ALU {dest: it.rdst, data:(zext_it_imm << 32'd16) }); 376 wbQ.enq(tagged WB_ALU {dest: it.rdst, data:(zext_it_imm << 32'd16) });
378 end 377 end
379 378
380 tagged SLL .it : 379 tagged SLL .it :
456 branchTaken = True; 455 branchTaken = True;
457 end 456 end
458 457
459 tagged JR .it : 458 tagged JR .it :
460 begin 459 begin
461 $display("PROCESSOR inst JR\n");
462 newPC = rf.rd1(it.rsrc); 460 newPC = rf.rd1(it.rsrc);
463 branchTaken = True; 461 branchTaken = True;
464 end 462 end
465 463
466 tagged JAL .it : 464 tagged JAL .it :
467 begin 465 begin
468 $display("PROCESSOR inst JAL\n");
469 wbQ.enq(tagged WB_ALU {dest:31, data:pc_plus4 }); 466 wbQ.enq(tagged WB_ALU {dest:31, data:pc_plus4 });
470 newPC = { pc_plus4[31:28], it.target, 2'b0 }; 467 newPC = { pc_plus4[31:28], it.target, 2'b0 };
471 branchTaken = True; 468 branchTaken = True;
472 end 469 end
473 470
480 477
481 // -- Cop0 ------------------------------------------------------ 478 // -- Cop0 ------------------------------------------------------
482 479
483 tagged MTC0 .it : //Recieve things from host computer 480 tagged MTC0 .it : //Recieve things from host computer
484 begin 481 begin
485 $display( " PROCESSOR MTC0 call\n"); 482 // $display( " PROCESSOR MTC0 call\n");
486 case ( it.cop0dst ) 483 case ( it.cop0dst )
487 5'd10 : cp0_statsEn <= unpack(truncate(rf.rd1(it.rsrc))); 484 5'd10 : cp0_statsEn <= unpack(truncate(rf.rd1(it.rsrc)));
488 5'd21 : cp0_tohost <= truncate(rf.rd1(it.rsrc)); 485 5'd21 : cp0_tohost <= truncate(rf.rd1(it.rsrc));
489 5'd26 : cp0_progComp <= unpack(truncate(rf.rd1(it.rsrc))); //states audio program completed and termination okay 486 5'd26 : cp0_progComp <= unpack(truncate(rf.rd1(it.rsrc))); //states audio program completed and termination okay
490 5'd27 : outAudioFifo.enq(tagged Sample unpack(truncate(rf.rd1(it.rsrc)))); //Bit size is 16 not 32 487 5'd27 : outAudioFifo.enq(tagged Sample unpack(truncate(rf.rd1(it.rsrc)))); //Bit size is 16 not 32
495 end 492 end
496 493
497 //this is host stuff? 494 //this is host stuff?
498 tagged MFC0 .it : //Things out 495 tagged MFC0 .it : //Things out
499 begin 496 begin
500 $display( " PROCESSOR MFC0 call\n");
501 case ( it.cop0src ) 497 case ( it.cop0src )
502 // not actually an ALU instruction but don't have the format otherwise 498 // not actually an ALU instruction but don't have the format otherwise
503 5'd10 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_statsEn)) }); 499 5'd10 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_statsEn)) });
504 5'd20 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_fromhost }); 500 5'd20 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_fromhost });
505 5'd21 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_tohost }); 501 5'd21 : wbQ.enq(tagged WB_ALU {dest:it.rdst, data:cp0_tohost });
506 5'd25 : begin 502 5'd25 : begin
507 $display( "**** EOF Requested\n "); 503 // $display( "**** EOF Requested\n ");
508 wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_audioEOF)) }); // Reading clears bit 504 wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(cp0_audioEOF)) }); // Reading clears bit
509 cp0_audioEOF <= False; 505 cp0_audioEOF <= False;
510 end 506 end
511 5'd28 : begin 507 5'd28 : begin
512 $display( "***** Reqesting Sample \n"); 508 // $display( "***** Reqesting Sample \n");
513 let sample = inAudioFifo.first(); // is this going to cause perf. delay? 509 let sample = inAudioFifo.first(); // is this going to cause perf. delay?
514 if (sample matches tagged Sample .audio) // if it is EOF another rule sets the cp0_audioEOF 510 if (sample matches tagged Sample .audio) // if it is EOF another rule sets the cp0_audioEOF
515 wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) }); // do I need pack? 511 wbQ.enq(tagged WB_ALU {dest:it.rdst, data:zext(pack(audio)) }); // do I need pack?
516 else $display ( "Audio File EOF Reached. Invalid sample request."); 512 else $display ( "Audio File EOF Reached. Invalid sample request.");
517 inAudioFifo.deq(); 513 inAudioFifo.deq();
518 end 514 end
519 default : 515 default :
520 $display( " RTL-ERROR : %m : Illegal MFC0 cop0src register!" ); 516 $display( " RTL-ERROR : %m : Illegal MFC0 cop0src register!" );
568 rule inc_num_cycles; 564 rule inc_num_cycles;
569 if ( cp0_statsEn ) 565 if ( cp0_statsEn )
570 num_cycles.incr(); 566 num_cycles.incr();
571 endrule 567 endrule
572 568
573 569 /*
574 // for now, we don't do anything. 570 // for now, we don't do anything.
575 // rule connectAudioReqResp; 571 rule connectAudioReqResp;
576 // $display("rlm: PROCESSOR copies a datum\n"); 572 $display("rlm: PROCESSOR copies a datum\n");
577 // outAudioFifo.enq(inAudioFifo.first()); 573 outAudioFifo.enq(inAudioFifo.first());
578 // inAudioFifo.deq; 574 inAudioFifo.deq;
579 // endrule 575 endrule
576 */
580 577
581 rule flagAudioEnd (inAudioFifo.first() matches tagged EndOfFile); 578 rule flagAudioEnd (inAudioFifo.first() matches tagged EndOfFile);
582 $display (" PROCESSOR End Audio Flag Set "); 579 $display (" PROCESSOR End Audio Flag Set ");
583 cp0_audioEOF <= True; 580 cp0_audioEOF <= True;
584 inAudioFifo.deq; 581 inAudioFifo.deq;
585 endrule 582 endrule
586 /* 583
587 rule sendAudioEnd (cp0_progComp); 584 rule sendAudioEnd (cp0_progComp);
588 $display (" PROCESSOR Says Program Complete "); 585 $display (" PROCESSOR Says Program Complete ");
589 outAudioFifo.enq(tagged EndOfFile); 586 outAudioFifo.enq(tagged EndOfFile);
590 cp0_progComp <= False; //only send one. And functions to reset 587 cp0_progComp <= False; //only send one. And functions to reset
591 endrule 588 endrule
592 */ 589
593 590
594 //----------------------------------------------------------- 591 //-----------------------------------------------------------
595 // Methods 592 // Methods
596 593
597 interface Client imem_client; 594 interface Client imem_client;