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comparison modules/bluespec/Pygar/core/mixer.bsv~ @ 33:2c8166d205d5 pygar svn.34

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[svn r34] uses scratchpad, set up for audio through c
author punk
date Tue, 04 May 2010 10:13:53 -0400
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32:0c775e733b81 33:2c8166d205d5
1 // The MIT License
2
3 // Copyright (c) 2009 Massachusetts Institute of Technology
4
5 // Permission is hereby granted, free of charge, to any person obtaining a copy
6 // of this software and associated documentation files (the "Software"), to deal
7 // in the Software without restriction, including without limitation the rights
8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 // copies of the Software, and to permit persons to whom the Software is
10 // furnished to do so, subject to the following conditions:
11
12 // The above copyright notice and this permission notice shall be included in
13 // all copies or substantial portions of the Software.
14
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 // THE SOFTWARE.
22
23 import Connectable::*;
24 import GetPut::*;
25 import ClientServer::*;
26 import Processor::*;
27 import MemArb::*;
28 import MemTypes::*;
29
30 //AWB includes
31 `include "asim/provides/low_level_platform_interface.bsh"
32 `include "asim/provides/soft_connections.bsh"
33 `include "asim/provides/common_services.bsh"
34
35 // Local includes
36 `include "asim/provides/processor_library.bsh"
37 `include "asim/provides/processor.bsh"
38 `include "asim/provides/audio_pipe_types.bsh"
39
40 interface Core;
41
42 // Interface from core to main memory
43 interface Client#(MainMemReq,MainMemResp) mmem_client;
44
45 interface Get#(AudioProcessorUnit) sampleOutput;
46
47 endinterface
48
49 module [CONNECTED_MODULE] mkCore( Core );
50
51 // Instantiate the modules
52
53 Proc proc <- mkProc();
54 ICache#(InstReq,InstResp) icache <- mkInstCache();
55 DCache#(DataReq,DataResp) dcache <- mkDataCache();
56 MemArb marb <- mkMemArb();
57
58 // Internal connections
59
60 interface sampleOutput = proc.sampleOutput;
61
62 endmodule