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annotate modules/bluespec/Pygar/lab4/processor.awb @ 65:cf8bb3038cbd pygar svn.66

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[svn r66] sim passes
author punk
date Tue, 11 May 2010 09:05:22 -0400
parents 50af57801d6e
children
rev   line source
rlm@8 1 %name 3-Stage Processor
rlm@8 2 %desc 3-Stage Processor, one stage per cycle.
rlm@8 3
rlm@8 4 %provides processor
rlm@8 5
punk@11 6 %attributes PYGAR
rlm@8 7
rlm@8 8 %public Processor.bsv ProcTypes.bsv
rlm@8 9 %public Processor.dic
rlm@8 10
rlm@8 11
rlm@8 12
rlm@8 13