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annotate modules/bluespec/Pygar/lab4/SFIFO.bsv @ 65:cf8bb3038cbd pygar svn.66

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[svn r66] sim passes
author punk
date Tue, 11 May 2010 09:05:22 -0400
parents 74716e9a81cc
children
rev   line source
rlm@8 1
rlm@8 2 import FIFO::*;
rlm@8 3 import ConfigReg::*;
rlm@8 4 import RWire::*;
rlm@8 5
rlm@8 6 import List::*;
rlm@8 7 import Monad::*;
rlm@8 8
rlm@8 9 interface SFIFO#(type alpha_T, type search_T);
rlm@8 10 method Action enq(alpha_T x);
rlm@8 11 method Action deq();
rlm@8 12 method alpha_T first();
rlm@8 13 method Action clear();
rlm@8 14 method Bool find(search_T x);
rlm@8 15 method Bool find2(search_T x);
rlm@8 16
rlm@8 17 endinterface
rlm@8 18
rlm@8 19 module mkSFIFO#(function Bool searchfunc(search_T s, alpha_T x)) (SFIFO#(alpha_T, search_T))
rlm@8 20 provisos
rlm@8 21 (Bits#(alpha_T,asz));
rlm@8 22
rlm@8 23 Reg#(alpha_T) f0 <- mkConfigRegU();
rlm@8 24 Reg#(alpha_T) f1 <- mkConfigRegU();
rlm@8 25
rlm@8 26 Reg#(Bool) vf0 <- mkConfigReg(False);
rlm@8 27 Reg#(Bool) vf1 <- mkConfigReg(False);
rlm@8 28
rlm@8 29 PulseWire edge1 <- mkPulseWire();
rlm@8 30
rlm@8 31 method Action enq(alpha_T x) if (!(vf0 && vf1));
rlm@8 32 if (edge1 || !vf0)//empty or we're dequeueing
rlm@8 33 begin
rlm@8 34 vf0 <= True; //True
rlm@8 35 vf1 <= False;
rlm@8 36 f0 <= x;
rlm@8 37 end
rlm@8 38 else // !vf1
rlm@8 39 begin
rlm@8 40 vf1 <= True;
rlm@8 41 f1 <= x;
rlm@8 42 end
rlm@8 43 endmethod
rlm@8 44
rlm@8 45 method Action deq() if (vf0);
rlm@8 46 edge1.send();
rlm@8 47 vf0 <= vf1;
rlm@8 48 f0 <= f1;
rlm@8 49 vf1 <= False;
rlm@8 50 endmethod
rlm@8 51
rlm@8 52 method alpha_T first() if(vf0);
rlm@8 53 return (f0);
rlm@8 54 endmethod
rlm@8 55
rlm@8 56 method Action clear();
rlm@8 57 vf0 <= False;
rlm@8 58 vf1 <= False;
rlm@8 59 endmethod
rlm@8 60
rlm@8 61 method Bool find(search_T sv);
rlm@8 62 Bool nvf0 = edge1 ? False: vf0;
rlm@8 63 Bool nvf1 = vf1;
rlm@8 64
rlm@8 65 return (nvf0 && searchfunc(sv, f0) ||
rlm@8 66 nvf1 && searchfunc(sv, f1));
rlm@8 67 endmethod
rlm@8 68
rlm@8 69 method Bool find2(search_T sv);
rlm@8 70 Bool nvf0 = edge1 ? False: vf0;
rlm@8 71 Bool nvf1 = vf1;
rlm@8 72
rlm@8 73 return (nvf0 && searchfunc(sv, f0) ||
rlm@8 74 nvf1 && searchfunc(sv, f1));
rlm@8 75 endmethod
rlm@8 76
rlm@8 77 endmodule
rlm@8 78
rlm@8 79 module mkSFIFO1#(function Bool searchfunc(search_T s, alpha_T x)) (SFIFO#(alpha_T, search_T))
rlm@8 80 provisos
rlm@8 81 (Bits#(alpha_T,asz), Eq#(alpha_T));
rlm@8 82
rlm@8 83 Reg#(alpha_T) f0 <- mkConfigRegU;
rlm@8 84
rlm@8 85 Reg#(Bool) vf0 <- mkConfigReg(False);
rlm@8 86
rlm@8 87 PulseWire edge1 <- mkPulseWire();
rlm@8 88
rlm@8 89 method Action enq(alpha_T x) if (!vf0);
rlm@8 90 vf0 <= True; //True
rlm@8 91 f0 <= x;
rlm@8 92 endmethod
rlm@8 93
rlm@8 94 method Action deq() if (vf0);
rlm@8 95 edge1.send();
rlm@8 96 vf0 <= False;
rlm@8 97 endmethod
rlm@8 98
rlm@8 99 method alpha_T first() if(vf0);
rlm@8 100 return (f0);
rlm@8 101 endmethod
rlm@8 102
rlm@8 103 method Action clear();
rlm@8 104 vf0 <= False;
rlm@8 105 endmethod
rlm@8 106
rlm@8 107 method Bool find(search_T sv);
rlm@8 108 Bool nvf0 = edge1 ? False: vf0;
rlm@8 109
rlm@8 110 return (nvf0 && searchfunc(sv, f0));
rlm@8 111 endmethod
rlm@8 112
rlm@8 113 method Bool find2(search_T sv);
rlm@8 114 Bool nvf0 = edge1 ? False: vf0;
rlm@8 115 return (nvf0 && searchfunc(sv, f0));
rlm@8 116 endmethod
rlm@8 117
rlm@8 118 endmodule
rlm@8 119
rlm@8 120 module mkSizedSFIFOInternal#(Integer n,
rlm@8 121 function Bool searchfunc1(search_T s, alpha_T x),
rlm@8 122 function Bool searchfunc2(search_T s, alpha_T x)) (SFIFO#(alpha_T, search_T))
rlm@8 123
rlm@8 124 provisos ( Bits#(alpha_T,alpha_SZ) );
rlm@8 125
rlm@8 126 List#(Reg#(alpha_T)) registers <- replicateM(n, mkRegU);
rlm@8 127 List#(Reg#(Bool)) valids <- replicateM(n, mkReg(False));
rlm@8 128
rlm@8 129 function Nat getNextFree (List#(Reg#(Bool)) vs);
rlm@8 130
rlm@8 131 Nat res = fromInteger(n - 1);
rlm@8 132
rlm@8 133 for (Integer x = n - 1; x > -1; x = x - 1)
rlm@8 134 res = !vs[x]._read() ? fromInteger(x) : res;
rlm@8 135
rlm@8 136 return res;
rlm@8 137
rlm@8 138 endfunction
rlm@8 139
rlm@8 140 function Bool notFull();
rlm@8 141
rlm@8 142 Bool full = True;
rlm@8 143
rlm@8 144 for (Integer x = 0; x < n; x = x + 1)
rlm@8 145 full = full && valids[x]._read();
rlm@8 146
rlm@8 147 return !full;
rlm@8 148
rlm@8 149 endfunction
rlm@8 150
rlm@8 151 method Action enq( alpha_T item ) if ( notFull() );
rlm@8 152
rlm@8 153 Nat k = getNextFree(valids);
rlm@8 154 select(valids, k)._write(True);
rlm@8 155 select(registers, k)._write(item);
rlm@8 156
rlm@8 157 endmethod
rlm@8 158
rlm@8 159 method Action deq() if ( valids[0]._read() );
rlm@8 160
rlm@8 161 for (Integer x = 0; x < (n-1); x = x + 1)
rlm@8 162 begin
rlm@8 163
rlm@8 164 (registers[x]) <= registers[x + 1]._read();
rlm@8 165 (valids[x]) <= valids[x + 1]._read();
rlm@8 166
rlm@8 167 end
rlm@8 168 (valids[n-1]) <= False;
rlm@8 169 endmethod
rlm@8 170
rlm@8 171 method alpha_T first() if ( valids[0]._read() );
rlm@8 172 return registers[0]._read();
rlm@8 173 endmethod
rlm@8 174
rlm@8 175 method Bool find(search_T sv);
rlm@8 176 Bool res = False;
rlm@8 177
rlm@8 178 for (Integer x = 0; x < n; x = x + 1)
rlm@8 179 if ( valids[x]._read() && searchfunc1(sv, registers[x]._read()) )
rlm@8 180 res = True;
rlm@8 181
rlm@8 182 return res;
rlm@8 183
rlm@8 184 endmethod
rlm@8 185
rlm@8 186 method Bool find2(search_T sv);
rlm@8 187 Bool res = False;
rlm@8 188
rlm@8 189 for (Integer x = 0; x < n; x = x + 1)
rlm@8 190 if ( valids[x]._read() && searchfunc2(sv, registers[x]._read()) )
rlm@8 191 res = True;
rlm@8 192
rlm@8 193 return res;
rlm@8 194
rlm@8 195 endmethod
rlm@8 196
rlm@8 197 method Action clear();
rlm@8 198
rlm@8 199 for (Integer x = 0; x < n; x = x + 1)
rlm@8 200 (valids[x]) <= False;
rlm@8 201
rlm@8 202 endmethod
rlm@8 203
rlm@8 204 endmodule
rlm@8 205
rlm@8 206 module mkSizedSFIFO#(Integer n, function Bool searchfunc(search_T s, alpha_T x)) (SFIFO#(alpha_T, search_T))
rlm@8 207 provisos
rlm@8 208 (Bits#(alpha_T,asz));
rlm@8 209
rlm@8 210 let foo <- mkSizedSFIFOInternal(n, searchfunc, searchfunc);
rlm@8 211 return foo;
rlm@8 212
rlm@8 213 endmodule