annotate core/src/Core.bsv @ 20:a346d9e5118a pygar svn.21

[svn r21] deleted emacs save files
author rlm
date Tue, 27 Apr 2010 23:43:41 -0400
parents 91a1f76ddd62
children
rev   line source
punk@1 1 // The MIT License
punk@1 2
punk@1 3 // Copyright (c) 2009 Massachusetts Institute of Technology
punk@1 4
punk@1 5 // Permission is hereby granted, free of charge, to any person obtaining a copy
punk@1 6 // of this software and associated documentation files (the "Software"), to deal
punk@1 7 // in the Software without restriction, including without limitation the rights
punk@1 8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
punk@1 9 // copies of the Software, and to permit persons to whom the Software is
punk@1 10 // furnished to do so, subject to the following conditions:
punk@1 11
punk@1 12 // The above copyright notice and this permission notice shall be included in
punk@1 13 // all copies or substantial portions of the Software.
punk@1 14
punk@1 15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
punk@1 16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
punk@1 17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
punk@1 18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
punk@1 19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
punk@1 20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
punk@1 21 // THE SOFTWARE.
punk@1 22
punk@1 23 import Connectable::*;
punk@1 24 import GetPut::*;
punk@1 25 import ClientServer::*;
punk@1 26
punk@1 27 import DataCacheBlocking::*;
punk@1 28 import InstCacheBlocking::*;
punk@1 29 import Processor::*;
punk@1 30 import MemArb::*;
punk@1 31 import MemTypes::*;
punk@1 32
punk@1 33 interface CoreStats;
punk@1 34 interface DCacheStats dcache;
punk@1 35 interface ICacheStats icache;
punk@1 36 interface ProcStats proc;
punk@1 37 endinterface
punk@1 38
punk@1 39 interface Core;
punk@1 40
punk@1 41 // Interface from core to main memory
punk@1 42 interface Client#(MainMemReq,MainMemResp) mmem_client;
punk@1 43
punk@1 44 // Statistics
punk@1 45 interface CoreStats stats;
punk@1 46
punk@1 47 // CPU to Host
punk@1 48 interface CPUToHost tohost;
punk@1 49
punk@1 50 endinterface
punk@1 51
punk@1 52 (* synthesize *)
punk@1 53 module mkCore(Core);
punk@1 54
punk@1 55 // Instantiate the modules
punk@1 56 Proc proc <- mkProc();
punk@1 57 ICache#(InstReq,InstResp) icache <- mkInstCache();
punk@1 58 DCache#(DataReq,DataResp) dcache <- mkDataCache();
punk@1 59 MemArb marb <- mkMemArb();
punk@1 60
punk@1 61 // Internal connections
punk@1 62 mkConnection( proc.statsEn_get, icache.statsEn_put );
punk@1 63 mkConnection( proc.statsEn_get, dcache.statsEn_put );
punk@1 64 mkConnection( proc.imem_client, icache.proc_server );
punk@1 65 mkConnection( proc.dmem_client, dcache.proc_server );
punk@1 66 mkConnection( icache.mmem_client, marb.cache0_server );
punk@1 67 mkConnection( dcache.mmem_client, marb.cache1_server );
punk@1 68
punk@1 69 // Methods
punk@1 70 interface mmem_client = marb.mmem_client;
punk@1 71
punk@1 72 interface CoreStats stats;
punk@1 73 interface dcache = dcache.stats;
punk@1 74 interface icache = icache.stats;
punk@1 75 interface proc = proc.stats;
punk@1 76 endinterface
punk@1 77
punk@1 78 interface CPUToHost tohost = proc.tohost;
punk@1 79
punk@1 80 endmodule
punk@1 81