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annotate scripts/proc-trace.cfg @ 42:ced2ebd41347 pygar svn.43

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[svn r43] bunch of updates that almost work...
author punk
date Wed, 05 May 2010 01:09:09 -0400
parents 90197e3375e2
children
rev   line source
rlm@23 1 #=========================================================================
rlm@23 2 # Trace-bsv.pl Config File
rlm@23 3 #
rlm@23 4
rlm@23 5 package settings;
rlm@23 6
rlm@23 7 #--------------------------------------------------------------------
rlm@23 8 # Trace Tags
rlm@23 9 #--------------------------------------------------------------------
rlm@23 10
rlm@23 11 $base = "mkCoreTH_wrapper.coreTH";
rlm@23 12
rlm@23 13 # This should be a hash of tags to what should be displayed if the
rlm@23 14 # tag is not present on a given cycle. The tags correspond to the
rlm@23 15 # trace tags used in the BSV source code.
rlm@23 16
rlm@23 17 %fields =
rlm@23 18 (
rlm@23 19
rlm@23 20 "mkProc:pc" => " ",
rlm@23 21 "mkProc:pcgen" => " ",
rlm@23 22 "mkProc:exec" => " ",
rlm@23 23 "mkProc:writeback" => " ",
rlm@23 24 "mkProc:exInstFull" => " ",
rlm@23 25
rlm@23 26 "mkInstCacheBlocking:reqTiny" => " ",
rlm@23 27 "mkInstCacheBlocking:respTiny" => " ",
rlm@23 28 "mkInstCacheBlocking:stage" => " ",
rlm@23 29 "mkInstCacheBlocking:hitMiss" => " ",
rlm@23 30
rlm@23 31 "mkDataCacheBlocking:reqTiny" => " ",
rlm@23 32 "mkDataCacheBlocking:respTiny" => " ",
rlm@23 33 "mkDataCacheBlocking:stage" => " ",
rlm@23 34 "mkDataCacheBlocking:hitMiss" => " ",
rlm@23 35
rlm@23 36 "mkMemArb:req0" => " ",
rlm@23 37 "mkMemArb:req1" => " ",
rlm@23 38 "mkMemArb:resp" => " ",
rlm@23 39
rlm@23 40 );
rlm@23 41
rlm@23 42 %headers =
rlm@23 43 (
rlm@23 44
rlm@23 45 "mkProc:pc" => "pc ",
rlm@23 46 "mkProc:pcgen" => "stage",
rlm@23 47 "mkProc:exec" => "",
rlm@23 48 "mkProc:writeback" => "",
rlm@23 49 "mkProc:exInstFull" => "exInst ",
rlm@23 50
rlm@23 51 "mkInstCacheBlocking:reqTiny" => "req",
rlm@23 52 "mkInstCacheBlocking:respTiny" => "resp",
rlm@23 53 "mkInstCacheBlocking:stage" => "stage",
rlm@23 54 "mkInstCacheBlocking:hitMiss" => "hit/miss",
rlm@23 55
rlm@23 56 "mkDataCacheBlocking:reqTiny" => "req",
rlm@23 57 "mkDataCacheBlocking:respTiny" => "resp",
rlm@23 58 "mkDataCacheBlocking:stage" => "stage",
rlm@23 59 "mkDataCacheBlocking:hitMiss" => "hit/miss",
rlm@23 60
rlm@23 61 "mkMemArb:req0" => "req0",
rlm@23 62 "mkMemArb:req1" => "req1",
rlm@23 63 "mkMemArb:resp" => "req2",
rlm@23 64
rlm@23 65 );
rlm@23 66
rlm@23 67
rlm@23 68 #--------------------------------------------------------------------
rlm@23 69 # Trace String
rlm@23 70 #--------------------------------------------------------------------
rlm@23 71
rlm@23 72 # For the processor we display the PC and what stage we are in.
rlm@23 73
rlm@23 74 $proc = "pc={mkProc:pc} [{mkProc:pcgen}|{mkProc:exec}|{mkProc:writeback}]";
rlm@23 75 $procl = "{mkProc:pc} [{mkProc:pcgen}{mkProc:exec}{mkProc:writeback}]";
rlm@23 76
rlm@23 77 # For the caches we display the current request and response,
rlm@23 78 # the current cache stage, whether or not the access is a hit or a miss.
rlm@23 79
rlm@23 80 $icache = "[{mkInstCacheBlocking:reqTiny}|{mkInstCacheBlocking:respTiny}|".
rlm@23 81 "{mkInstCacheBlocking:stage}|{mkInstCacheBlocking:hitMiss}]";
rlm@23 82
rlm@23 83 $dcache = "[{mkDataCacheBlocking:reqTiny}|{mkDataCacheBlocking:respTiny}|".
rlm@23 84 "{mkDataCacheBlocking:stage}|{mkDataCacheBlocking:hitMiss}]";
rlm@23 85
rlm@23 86 # For the memory arbiter we display the two requests from the
rlm@23 87 # instruction and data caches and the response (which might be
rlm@23 88 # going to either cache)
rlm@23 89
rlm@23 90 $marb = "[{mkMemArb:req0}|{mkMemArb:req1}|{mkMemArb:resp}]";
rlm@23 91
rlm@23 92 # The trace string is used by bsv-trace.pl to for one line trace
rlm@23 93 # output. Basically the current value for a given tag is substituted
rlm@23 94 # into the trace string every cycle. If the tag is not present then
rlm@23 95 # the empty field is used form the %fields hash.
rlm@23 96
rlm@23 97 $traceString = "$proc $icache $dcache $marb {mkProc:exInstFull} ";
rlm@23 98 $labelString = "$procl $icache $dcache $marb {mkProc:exInstFull} ";
rlm@23 99