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1 // The MIT License
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2
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3 // Copyright (c) 2009 Massachusetts Institute of Technology
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4
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5 // Permission is hereby granted, free of charge, to any person obtaining a copy
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6 // of this software and associated documentation files (the "Software"), to deal
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7 // in the Software without restriction, including without limitation the rights
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8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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9 // copies of the Software, and to permit persons to whom the Software is
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10 // furnished to do so, subject to the following conditions:
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11
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12 // The above copyright notice and this permission notice shall be included in
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13 // all copies or substantial portions of the Software.
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14
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15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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21 // THE SOFTWARE.
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22
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23 import Connectable::*;
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24 import GetPut::*;
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25 import ClientServer::*;
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26 import FIFO::*;
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27 import SpecialFIFOs::*;
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28
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29 //AWB includes
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30 `include "asim/provides/low_level_platform_interface.bsh"
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31 `include "asim/provides/soft_connections.bsh"
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32 `include "asim/provides/common_services.bsh"
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33
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34
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35 // Local includes
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36 `include "asim/provides/core.bsh"
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37 `include "asim/provides/processor_library.bsh"
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38 `include "asim/provides/processor_library.bsh"
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39 `include "asim/provides/fpga_components.bsh"
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40 `include "asim/rrr/remote_client_stub_PROCESSORSYSTEMRRR.bsh"
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41
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42 module [CONNECTED_MODULE] mkConnectedApplication ();
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43
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44 Core core <- mkCore;
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45 Reg#(int) cycle <- mkReg(0);
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46
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47 //External memory
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48 // I'm not comfortable assuming that the memory subsystem is in order
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49 // So I'll insert a completion buffer here.
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50 ClientStub_PROCESSORSYSTEMRRR client_stub <- mkClientStub_PROCESSORSYSTEMRRR();
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51 // Make this big enough so that several outstanding requests may be supported
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52 FIFO#(Bit#(MainMemTagSz)) tags <- mkSizedFIFO(8);
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53
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54 // this is for the tracing
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55 rule printCycles;
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56 cycle <= cycle+1;
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57 $fdisplay(stderr, " => Cycle = %d", cycle);
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58 endrule
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59
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60
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61 rule sendMemReq;
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62 let coreReq <- core.mmem_client.request.get;
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63 case (coreReq) matches
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64 tagged LoadReq .load: begin
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65 //Allocate ROB space
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66 client_stub.makeRequest_MemoryRequestLoad(load.addr);
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67 tags.enq(load.tag);
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68 end
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69 tagged StoreReq .store: begin
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70 client_stub.makeRequest_MemoryRequestStore(store.addr,store.data);
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71 end
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72 endcase
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73 endrule
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74
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75 rule receiveMemResp;
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76 let memResp <- client_stub.getResponse_MemoryRequestLoad();
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77 tags.deq;
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78 core.mmem_client.response.put(tagged LoadResp {data:memResp,
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79 tag: tags.first});
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80 endrule
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81
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82 endmodule |
